3D Memory Modules with TSVs for High-Speed, Low-Power Systems
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Summary
Problems
Computer systems face challenges in increasing main memory performance without corresponding increases in energy consumption or cost, primarily due to the need for long electrical interconnects which lead to higher power consumption and increased costs associated with pin count and die area.
Innovation solutions
The implementation of stacked three-dimensional memory modules using through silicon vias for internal data buses, reducing internal interconnect delays and power consumption, and incorporating an optical layer for high-speed, low-power data transmission via bus waveguides.
TRIZ Analysis
Specific contradictions:
General conflict description:
Principle concept:
If electrical interconnects are used to connect memory chips to controller, then data transmission can be achieved, but power consumption increases and signal integrity deteriorates over long distances
Why choose this principle:
The patent transitions from two-dimensional planar interconnects to three-dimensional vertical interconnects using through-silicon vias (TSVs). Memory stacks are vertically stacked and connected via TSVs that penetrate through the silicon substrate, enabling short vertical connections between layers while eliminating long horizontal wire traces, thus reducing power consumption and improving signal integrity
Principle concept:
If electrical interconnects are used to connect memory chips to controller, then data transmission can be achieved, but power consumption increases and signal integrity deteriorates over long distances
Why choose this principle:
The patent replaces electrical interconnects with optical interconnects for data transmission between processor and memory controller. Optical signals transmit through waveguides without suffering from electrical resistance, capacitive loading, and electromagnetic interference that plague electrical wires, thereby reducing power consumption and maintaining signal integrity over longer distances
Application Domain
Data Source
AI summary:
The implementation of stacked three-dimensional memory modules using through silicon vias for internal data buses, reducing internal interconnect delays and power consumption, and incorporating an optical layer for high-speed, low-power data transmission via bus waveguides.
Abstract
Various embodiments of the present invention are directed to stacked memory modules. In one embodiment of the present invention, a memory module comprises at least one memory-controller layer stacked with at least one memory layer. Fine pitched through vias (e.g., through silicon vias) extend approximately perpendicular to a surface of the at least one memory controller through the stack providing electronic communication between the at least one memory controller and the at least one memory layers. Additionally, the memory-controller layer includes at least one external interface configured to transmit data to and from the memory module. Furthermore, the memory module can include an optical layer. The optical layer can be included in the stack and has a bus waveguide to transmit data to and from the at least one memory controller. The external interface can be an optical external interface which interfaces with the optical layer.