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Home»TRIZ Case»Optimized Field Stop Layers for High-Performance Semiconductors

Optimized Field Stop Layers for High-Performance Semiconductors

May 22, 20264 Mins Read
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Optimized Field Stop Layers for High-Performance Semiconductors

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Summary

Problems

Conventional semiconductor devices with field stop layers face challenges in maintaining breakdown voltage and reducing on-voltage deviation when the thickness of the drift layer is reduced, particularly in achieving a balanced carrier concentration distribution for efficient hole injection and switching speed.

Innovation solutions

A method involving multiple hydrogen ion implantation processes with varying accelerating voltages to form a broad n-type field stop layer, followed by heat treatment and laser annealing to optimize carrier concentration distribution, reduces the carrier concentration at the interface and enhances the slope of the carrier concentration profile, thereby controlling the carrier concentration ratio and improving switching speed.

TRIZ Analysis

Specific contradictions:

on-voltage
vs
breakdown voltage

General conflict description:

Use of energy by moving object
vs
Reliability
TRIZ inspiration library
3 Local quality
Try to solve problems with it

Principle concept:

If the thickness of the drift layer is reduced to lower the on-voltage, then the on-voltage decreases, but the breakdown voltage cannot be maintained

Why choose this principle:

The patent applies local quality by creating a field stop layer with a specific carrier concentration peak at a defined depth from the back surface. This localized high-concentration region (1E16 to 1E18 atoms/cm³) differs from both the drift layer and collector layer, enabling the thin drift layer structure to maintain breakdown voltage while keeping on-voltage low. The field stop layer's specific position and concentration profile provide localized electrical field control that resolves the contradiction between thin drift layer and high breakdown voltage.

TRIZ inspiration library
35 Parameter changes
Try to solve problems with it

Principle concept:

If the thickness of the drift layer is reduced to lower the on-voltage, then the on-voltage decreases, but the breakdown voltage cannot be maintained

Why choose this principle:

The patent utilizes parameter changes by controlling the carrier concentration distribution through proton irradiation dose and accelerating voltage. By adjusting these parameters, the field stop layer's carrier concentration peak is formed at the optimal depth and magnitude. This parameter control enables the drift layer thickness to be reduced while maintaining the necessary electrical characteristics for both low on-voltage and high breakdown voltage, effectively resolving the contradiction.

Application Domain

field stop layer semiconductor optimization carrier concentration

Data Source

Patent US9954053B2 Semiconductor device and method of manufacturing semiconductor device
Publication Date: 24 Apr 2018 TRIZ 机械制造
FIG 01
US09954053-D00000
FIG 02
US09954053-D00001
FIG 03
US09954053-D00002
Login to view Image

AI summary:

A method involving multiple hydrogen ion implantation processes with varying accelerating voltages to form a broad n-type field stop layer, followed by heat treatment and laser annealing to optimize carrier concentration distribution, reduces the carrier concentration at the interface and enhances the slope of the carrier concentration profile, thereby controlling the carrier concentration ratio and improving switching speed.

Abstract

A method of manufacturing a semiconductor device, including implanting hydrogen atoms from a second principal surface of a semiconductor substrate, forming a plurality of second semiconductor layers that each have a carrier concentration higher than that of the first semiconductor layer and that have carrier concentration peak values at different depths from the second principal surface of the semiconductor substrate, applying a heat treatment process to promote generation of donors from the hydrogen atoms, implanting an impurity from the second principal surface of the semiconductor substrate, forming a third semiconductor layer in the semiconductor substrate at the second principal surface thereof, and applying another heat treatment process to locally heat the semiconductor substrate, so as to reduce the carrier concentration at an interface between the third semiconductor layer and the second semiconductor layer adjacent to the third semiconductor layer.

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    Table of Contents
    • Optimized Field Stop Layers for High-Performance Semiconductors
      • Summary
      • TRIZ Analysis
      • Data Source
      • Accelerate from idea to impact
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