High Electron Mobility Transistor Design for Improved Reliability
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Summary
Problems
Enhancement-mode high electron mobility transistors face challenges in optimizing gate-to-drain capacitance, subthreshold slope, and on-state resistance, where improving one parameter often compromises another, leading to trade-offs in device reliability and performance.
Innovation solutions
The implementation of a high electron mobility transistor design featuring a gate electrode with a lower dielectric film that increases sheet resistance near the gate electrode and an upper dielectric film that reduces sheet resistance, along with a recessed barrier layer and source-side extension regions, to manage electron density and resistance, thereby improving subthreshold slope and reducing Miller ratio.
TRIZ Analysis
Specific contradictions:
General conflict description:
Principle concept:
If a gate field electrode is extended toward the drain electrode to improve device reliability, then gate breakdown voltage increases, but gate-to-drain capacitance increases leading to higher Miller ratio
Why choose this principle:
The patent applies local quality by introducing a dielectric film specifically in the access region near the gate electrode, rather than uniformly across the entire device. This localized modification allows the gate field electrode to extend toward the drain for improved reliability while the dielectric film locally reduces the gate-to-drain capacitance, thereby lowering the Miller ratio without compromising the breakdown voltage enhancement.
Principle concept:
This TRIZ principle provides a structured way to resolve the technical contradiction.
Why choose this principle:
The principle is relevant because it supports the core trade-off described in the patent.
Application Domain
Data Source
AI summary:
The implementation of a high electron mobility transistor design featuring a gate electrode with a lower dielectric film that increases sheet resistance near the gate electrode and an upper dielectric film that reduces sheet resistance, along with a recessed barrier layer and source-side extension regions, to manage electron density and resistance, thereby improving subthreshold slope and reducing Miller ratio.
Abstract
An electronic device can include a HEMT. In an embodiment, a gate electrode, a drain electrode, and an access region including a first portion closer to the gate electrode and a second portion closer to the drain electrode. A lower dielectric film can overlie a portion of the access region, and an upper dielectric region can overlie another portion of the access region. In another embodiment, a dielectric film can have a relatively positive or negative charge and a varying thickness. In a further embodiment, the HEMT can include a gate electrode; a dielectric film overlying the gate electrode and defining openings to the gate electrode, wherein a portion of the dielectric film is disposed between the openings; and a gate interconnect extending into the openings of the dielectric film and contacting the gate electrode and the portion of the dielectric film.