Non-Volatile C-Element Design for Reliable Data Retention
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Summary
Problems
Asynchronous circuits lack non-volatile memory for data storage, leading to data loss when powered down, and existing solutions increase energy consumption.
Innovation solutions
A C-element with cross-coupled inverters and non-volatile memory using programmable resistive elements, such as spin transfer torque elements, to store data in resistive states, allowing for data backup and restore phases using existing transistors during specific logic levels.
TRIZ Analysis
Specific contradictions:
General conflict description:
Principle concept:
If a non-volatile memory is added to the C-element for data backup, then data retention capability is improved, but device complexity increases
Why choose this principle:
The patent merges the volatile storage function (latch) and non-volatile storage function (resistive memory) into a single integrated C-element structure. The resistive elements are coupled directly to the storage nodes of the latch through transistors, creating a unified circuit that performs both volatile and non-volatile storage without requiring separate independent memory blocks, thereby improving data retention while limiting complexity increase.
Principle concept:
If a non-volatile memory is added to the C-element for data backup, then data retention capability is improved, but device complexity increases
Why choose this principle:
The resistive memory elements serve multiple functions: they act as non-volatile storage during power cycles, provide data backup during operation, and enable state restoration. The same resistive elements and associated transistors are used for both data retention and data restoration functions, reducing the need for additional dedicated components and mitigating complexity increases.
Application Domain
Data Source
AI summary:
A C-element with cross-coupled inverters and non-volatile memory using programmable resistive elements, such as spin transfer torque elements, to store data in resistive states, allowing for data backup and restore phases using existing transistors during specific logic levels.
Abstract
The invention concerns a circuit comprising: a C-element having first and second input nodes and first and second inverters ( 110, 112 ) cross-coupled between first and second complementary storage nodes ( Q, Z), the second storage node (Z) forming an output node of the C-element; and a non-volatile memory comprising: a first resistive element ( 202 ) having a first terminal coupled to the first storage node ( Q); a second resistive element ( 204 ) having a first terminal coupled to the second storage node (Z), at least one of the first and second resistive elements being programmable to have one of at least two resistive states (R min , R max ), wherein a second terminal of the first resistive element ( 202 ) is coupled to a second terminal of the second resistive element ( 204 ) via a first transistor ( 210 ); and a control circuit ( 232 ).