Improved Resistive Memory Design for Enhanced Switching
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Summary
Problems
Current resistive memory devices face limitations in switching characteristics due to a large contacting area between the bottom electrode and the resistive layer, making it difficult to uniformly control filamentary current paths and requiring high reset currents, which is exacerbated by the challenges of reducing contact plug dimensions in advanced fabrication processes.
Innovation solutions
A resistive memory device is fabricated using a damascene process to form a resistive layer with a hole structure having positive slope sidewalls and a bottom width equal to or smaller than the bottom electrode, reducing the contacting area and facilitating the formation of a smaller switching region, thereby improving switching characteristics and reducing reset current.
TRIZ Analysis
Specific contradictions:
General conflict description:
Principle concept:
If the bottom electrode dimensions are made larger to ensure sufficient contacting area, then the contacting area between bottom electrode and resistive layer increases, but the switching characteristic deteriorates and reset current increases
Why choose this principle:
The patent segments the bottom electrode into two distinct functional regions: a large-area contact electrode for reliable electrical contact and a small-area switching electrode for precise filamentary current path control. This segmentation allows the contacting area to be sufficiently large while the switching region remains small, resolving the contradiction between contacting area and switching characteristic.
Principle concept:
If the bottom electrode dimensions are made larger to ensure sufficient contacting area, then the contacting area between bottom electrode and resistive layer increases, but the switching characteristic deteriorates and reset current increases
Why choose this principle:
The patent applies local quality by creating a bottom electrode with non-uniform dimensions – the contact electrode has a larger area for reliable contact, while the switching electrode has a smaller area for precise switching control. This local differentiation allows each region to optimize its function, improving switching characteristic while maintaining sufficient contacting area.
Application Domain
Data Source
AI summary:
A resistive memory device is fabricated using a damascene process to form a resistive layer with a hole structure having positive slope sidewalls and a bottom width equal to or smaller than the bottom electrode, reducing the contacting area and facilitating the formation of a smaller switching region, thereby improving switching characteristics and reducing reset current.
Abstract
A resistive memory device includes: a bottom electrode formed over a substrate; and an insulation layer having a hole structure formed over the substrate structure. Herein, the hole structure exposes the bottom electrode, has sidewalls of positive slope, and has a bottom width equal to or smaller than a width of the bottom electrode; a resistive layer formed over the hole structure; and an upper electrode formed over the resistive layer.