Super Junction Transistor Design for High Voltage and Low Resistance
Here’s PatSnap Eureka !
Summary
Problems
Conventional semiconductor devices with super junction structures face challenges in increasing withstand voltage without increasing turn on resistance, and their fabrication is complex and costly due to the need for multiple epitaxial growth processes.
Innovation solutions
A semiconductor device with a super junction structure is fabricated by stacking epitaxial layers with alternating doping regions, where a second epitaxial layer with trenches exposes the first doping region, and a third doping region is formed adjacent to the trench sidewall, allowing for higher doping concentrations and simplifying the process by reducing the number of epitaxial layers needed.
TRIZ Analysis
Specific contradictions:
General conflict description:
Principle concept:
If the doping concentration of the N-type epitaxial drift region is reduced and/or the thickness is increased to increase the withstand voltage of the P-N junction, then the withstand voltage is improved, but the turn on resistance increases
Why choose this principle:
The N-type epitaxial drift region is segmented into multiple lightly doped regions (first and second epitaxial layers) with alternating P-type doping regions. This segmentation creates a super junction structure where the electric field is distributed across multiple depletion regions, enabling higher withstand voltage while maintaining lower turn on resistance through the combined effect of multiple parallel conduction paths.
Principle concept:
If the doping concentration of the N-type epitaxial drift region is reduced and/or the thickness is increased to increase the withstand voltage of the P-N junction, then the withstand voltage is improved, but the turn on resistance increases
Why choose this principle:
Different regions of the semiconductor device are given different doping concentrations to optimize local functions. The N-type epitaxial layers have low doping concentration for high breakdown voltage, while the P-type base region and source region have higher doping concentrations for efficient carrier injection and low on-resistance. This local quality differentiation allows simultaneous optimization of both withstand voltage and turn on resistance.
Application Domain
Data Source
AI summary:
A semiconductor device with a super junction structure is fabricated by stacking epitaxial layers with alternating doping regions, where a second epitaxial layer with trenches exposes the first doping region, and a third doping region is formed adjacent to the trench sidewall, allowing for higher doping concentrations and simplifying the process by reducing the number of epitaxial layers needed.
Abstract
The field-effect transistor (20;20';20";20"') includes a plurality of first epitaxial layers (204), a second epitaxial layer (206) and a gate structure (228;230). The plurality of first epitaxial layers (204) is stacked on a substrate (200) and has a first conductivity type. Each first epitaxial layer (204) includes at least one first doping region (204a) and at least one second doping (204b) region adjacent thereto. The first doping region (204a) has a second conductivity and the second doping region (204b) has the first conductivity type. The second epitaxial layer (206) is disposed on the plurality of first epitaxial layers (204), having the first conductivity type. The second epitaxial layer (206) has a trench (206a) therein and a third doping region (212;212';212";212"') having the second conductivity type is adjacent to a sidewall of the trench (206a). The gate structure (228;230) is disposed on the second epitaxial layer (206) above the second doping region (204b). A method of fabricating the field-effect transistor (20;20';20";20"') is also disclosed.