Uniform Surface Roughening for Semiconductor Chip Reliability
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Summary
Problems
Conventional surface roughening methods for semiconductor chips lead to uneven surfaces, increased risk of die break and scratch, and oxidation, which complicates subsequent processes and reduces fabrication throughput and yield.
Innovation solutions
A surface roughening method where a semiconductor chip is stably mounted to a carrier board, allowing for a uniform rough structure to be formed on the chip's surface, which can include both active and non-active surfaces, and optionally the carrier board, using processes like micro-etching or plasma etching to prevent oxidation and enable direct circuit build-up.
TRIZ Analysis
Specific contradictions:
General conflict description:
Principle concept:
If a micro-etch process is performed on a die comprising multiple semiconductor chips, then surface roughening is achieved to increase bonding force, but the roughened surface becomes uneven and oxidation occurs
Why choose this principle:
The patent segments the processing approach by treating each semiconductor chip individually after separation from the die, rather than processing the entire die at once. This is achieved by mounting each chip to a carrier board with its active surface exposed, allowing targeted roughening of only the required surface area. This segmentation prevents the uneven roughening that occurs when large dies are processed together.
Principle concept:
If a micro-etch process is performed on a die comprising multiple semiconductor chips, then surface roughening is achieved to increase bonding force, but the roughened surface becomes uneven and oxidation occurs
Why choose this principle:
The patent performs preliminary mounting of semiconductor chips to carrier boards before performing the surface roughening process. This preliminary action stabilizes the chips and positions them for precise, uniform roughening of only the exposed active surfaces. The carrier board provides support during roughening, preventing the die break and scratch problems that occur when processing thinned dies.
Application Domain
Data Source
AI summary:
A surface roughening method where a semiconductor chip is stably mounted to a carrier board, allowing for a uniform rough structure to be formed on the chip's surface, which can include both active and non-active surfaces, and optionally the carrier board, using processes like micro-etching or plasma etching to prevent oxidation and enable direct circuit build-up.
Abstract
A surface roughening method for an embedded semiconductor chip structure is proposed. The method includes providing a carrier board with an opening and mounting a semiconductor chip in the opening of the carrier board, the semiconductor chip having a plurality of electrode pads; and performing a surface roughening process on a surface of the electrode pads of the semiconductor chip, so as to form a rough structure on a surface of the semiconductor chip exposed by the opening of the carrier board. Thus, adhesion between the chip and a dielectric layer is improved during subsequently forming circuit build-up layers on the roughened surface of the semiconductor chip and on the surface of carrier board.