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Home»TRIZ Case»Ventilated Puck Design for Semiconductor Wafer Protection

Ventilated Puck Design for Semiconductor Wafer Protection

May 22, 20263 Mins Read
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Ventilated Puck Design for Semiconductor Wafer Protection

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Summary

Problems

Existing semiconductor wafer pucks suffer from poor gas exchange due to their sealed design, leading to deformation and contamination of the wafer surface during vacuuming and inflation processes, which affects the integrity of the wafers.

Innovation solutions

A ventilated puck design with a ventilation channel that includes a dustproof labyrinth structure, allowing for improved gas exchange while preventing dust entry, is introduced. This design features various groove configurations such as L-shaped, zigzag, and annular grooves with protrusions to manage gas flow and dust prevention.

TRIZ Analysis

Specific contradictions:

sealing performance
vs
gas exchange efficiency

General conflict description:

Reliability
vs
Productivity
TRIZ inspiration library
1 Segmentation
Try to solve problems with it

Principle concept:

If the puck is designed with a tight fit between upper box and lower box to achieve sealing, then the sealing performance is improved, but gas exchange between interior and exterior deteriorates

Why choose this principle:

The ventilation channel is segmented into multiple sections including inlet, labyrinth structure, and outlet portions, allowing gas to flow through while preventing dust entry. The channel divides the sealed structure into functional zones that simultaneously achieve sealing and ventilation.

TRIZ inspiration library
24 Intermediary (Mediator)
Try to solve problems with it

Principle concept:

If the puck is designed with a tight fit between upper box and lower box to achieve sealing, then the sealing performance is improved, but gas exchange between interior and exterior deteriorates

Why choose this principle:

The ventilation channel acts as an intermediary structure between the sealed interior and exterior environment. It mediates gas exchange while filtering out dust particles through its labyrinthine design, allowing beneficial gas flow while blocking harmful contaminants.

Application Domain

ventilated puck semiconductor wafers dustproof design

Data Source

Patent US12040206B2 Ventilated puck
Publication Date: 16 Jul 2024 TRIZ 电器元件
FIG 01
US12040206-D00001
FIG 02
US12040206-D00002
FIG 03
US12040206-D00003
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AI summary:

A ventilated puck design with a ventilation channel that includes a dustproof labyrinth structure, allowing for improved gas exchange while preventing dust entry, is introduced. This design features various groove configurations such as L-shaped, zigzag, and annular grooves with protrusions to manage gas flow and dust prevention.

Abstract

A ventilated puck is provided. The ventilated puck includes an upper box, a spider plate, and a lower box. In particular, the upper box is fitted on the lower box to form a hollow structure, in which the spider plate is disposed. A ventilation channel for communicating the hollow structure with an external environment is provided in the upper box, or in the lower box or at interface between the upper box and the lower box. The ventilated puck of the present application may ensure gas exchange during the gas protection process conducted on semiconductor wafers, thereby preventing deformation of the puck due to pressure differences. Optionally, the interior of the ventilation channel is provided with a dustproof labyrinth structure, thereby preventing the entry of dust.

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    dustproof design semiconductor wafers ventilated puck
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    Table of Contents
    • Ventilated Puck Design for Semiconductor Wafer Protection
      • Summary
      • TRIZ Analysis
      • Data Source
      • Accelerate from idea to impact
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