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Double Side Polished Glass Substrate: Advanced Manufacturing Techniques And Performance Optimization For High-Precision Applications

APR 3, 202669 MINS READ

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Double side polished glass substrates represent a critical component in advanced optical, semiconductor, and display technologies, where exceptional surface flatness, minimal defects, and precise thickness control are paramount. These substrates undergo simultaneous polishing of both principal surfaces to achieve nanometer-level flatness (typically ≤30 nm) and surface roughness (Ra <0.5 nm), making them indispensable for photomask blanks, reticle substrates, liquid crystal displays (LCDs), and extreme ultraviolet lithography (EUVL) applications 1,4,13. The manufacturing process employs sophisticated double-side polishing apparatus equipped with upper and lower polishing plates, precision carriers, and controlled slurry delivery systems to ensure uniform material removal while preventing edge damage and maintaining geometric integrity across substrate dimensions ranging from small wafers to large-area glass panels exceeding 1 m² 2,7.
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Fundamental Principles And Apparatus Configuration Of Double Side Polished Glass Substrate Manufacturing


The production of double side polished glass substrates relies on specialized double-side polishing apparatus that simultaneously process both principal surfaces of glass workpieces. The core configuration comprises an upper polishing plate and a lower polishing plate, each fitted with polishing pads, positioned to sandwich the glass substrate within a precision carrier 3,10. The carrier features through-holes dimensioned to hold substrates securely while allowing controlled contact with polishing surfaces. Modern systems incorporate plate driving units that rotate both polishing plates about their respective axes, combined with independent carrier rotation mechanisms to ensure uniform material removal across the entire substrate surface 3. The lower polishing plate typically remains stationary or rotates at controlled speeds, while the upper polishing plate can move vertically to apply precise downward pressure, with typical operating pressures ranging from 50 to 300 g/cm² depending on substrate material and target removal rates 6,8.
Slurry delivery systems constitute a critical subsystem, featuring supply holes formed in at least one polishing plate connected to slurry supply pipes that transport abrasive slurry from pressurized reservoirs 2,3. Advanced designs incorporate water-repellent resin materials (contact angle with water >100°) in the slurry supply pipe sections between filters and supply holes to prevent slurry degradation and foreign matter accumulation 2. The polishing pads themselves are engineered composites, often consisting of a fiber layer (woven or non-woven cloth) bonded to a resin layer, with Shore A hardness values typically ≤70 and surface roughness (Ra) ≤50 μm to balance cutting efficiency with surface quality 6,13. For demanding applications such as EUVL substrates requiring flatness <30 nm, specialized two-layer polishing pads are employed: a first flexible plastic sheet with surface porosity (compressibility ≥20%) bonded to a second stiffer backing sheet (compressibility <20%), with the backing surface subjected to buffing before mounting to optimize pad-platen contact 13.
### Carrier Design And Substrate Holding Mechanisms For Double Side Polished Glass Substrate
The carrier design directly impacts polishing uniformity and edge quality in double side polished glass substrate production. Traditional carriers feature a main body forming a gear part around the periphery for engagement with the apparatus drive mechanism, with through-holes precisely machined to substrate dimensions plus a controlled clearance of 0.2–1.0 mm 7,10. To prevent edge damage—a critical defect mode—modern carriers incorporate protective features including coating layers of abrasion-resistant materials (such as ceramic composites or hardened polymers) applied to the upper and lower edges of through-holes, with typical coating widths of 2–5 mm and thicknesses of 0.1–0.5 mm 10. Additionally, resin cushion rings with thickness matching the carrier main body are installed on the inner circumferential faces of through-holes to provide compliant support that absorbs localized stress concentrations during polishing 10.
For high-quality semiconductor silicon wafer polishing, metal carriers with hydrophobic surface treatments (contact angle with pure water ≥50°) are employed in conjunction with polishing cloths exhibiting contact angles ≥100° and compression rates ≥5.0% 5. This combination minimizes wafer adhesion to polishing pads and reduces surface defects, achieving haze levels <0.1 ppm and defect densities <0.01 defects/cm² 5. The carrier material selection balances rigidity (to maintain geometric stability under polishing loads of 5–20 kN) with flexibility at substrate contact points (to prevent stress-induced microcracks), with common materials including glass-fiber reinforced epoxy composites, engineering thermoplastics (PEEK, PPS), and aluminum alloys with surface treatments 7,10.
## Polishing Pad Engineering And Slurry Formulation For Double Side Polished Glass Substrate
Polishing pad selection and slurry chemistry are interdependent factors governing material removal rate (MRR), surface finish, and defect generation in double side polished glass substrate manufacturing. For glass substrates, suede-type polishing pads fabricated from polyurethane foam with controlled pore structures (average pore diameter 30–80 μm, porosity 20–40%) are widely used for finish polishing stages, providing MRR of 0.5–2.0 μm/min while achieving surface roughness Ra <0.3 nm 4,6. However, these soft pads can exhibit instability under excessive pressure, leading to edge roll-off and flatness degradation, particularly for large-format substrates (>500 mm diagonal) 4. To address this limitation, laminated polishing pads combining a fiber reinforcement layer with a resin matrix are employed for rough polishing stages, offering enhanced dimensional stability and MRR up to 5 μm/min, though requiring careful management of fiber layer edges to prevent carrier damage 3.
The polishing pad surface characteristics must be optimized relative to substrate adsorption forces to prevent undesirable adhesion. For double-side polishing of glass substrates, the adsorption force F1 between the lower pad and substrate must exceed F2 (upper pad adsorption) minus the substrate weight force (w×g), expressed as F1 > F2 - w×g, where w is substrate mass in grams and g is gravitational acceleration (9.81 m/s²) 6. This relationship is achieved by controlling pad parameters including average pore opening diameter, numerical aperture per unit area, opening ratio, and surface roughness, with typical designs specifying lower pad opening ratios of 25–35% versus 15–25% for upper pads 6.
### Abrasive Slurry Composition And Delivery Optimization
Slurry formulation for double side polished glass substrate production follows a multi-stage approach. Primary polishing employs cerium oxide (CeO₂) based slurries with particle concentrations of 5–15 wt%, particle sizes of 0.5–2.0 μm, and pH values of 8–10, achieving MRR of 2–4 μm/min with moderate surface quality (Ra ~5–10 nm) 4. Finish polishing utilizes colloidal silica (SiO₂) slurries with particle sizes of 15–90 nm, concentrations of 3–8 wt%, and pH 9–11, reducing MRR to 0.3–1.0 μm/min while improving surface roughness to Ra <0.5 nm and minimizing subsurface damage to <50 nm depth 4,16. For HDD glass substrates requiring exceptional planarity, colloidal silica with average primary particle diameter of 15–90 nm is applied at surface densities of 10–500 particles/μm² in a lubricating layer formation step, reducing fine warping to <10 nm over 50 mm span 16.
Advanced slurry formulations incorporate abrasive grains with degree of association <1.0, defined as the ratio of volume-based average particle diameter (measured by dynamic light scattering) to number-based average actual particle diameter (measured by scanning electron microscopy) 18. This low association ensures minimal particle agglomeration, enabling uniform material removal and reduced scratch generation. For silicon wafer double-side polishing, a two-stage process employs first polishing with low-association slurry followed by second polishing (≤15 seconds duration) using slurry containing water-soluble polymers (such as polyvinyl alcohol or polyethylene glycol at 0.1–1.0 wt%), achieving back surface roughness ≥2 μm (beneficial for photolithography friction reduction) while maintaining front surface Ra <0.2 nm 18.
Slurry delivery system design critically affects polishing uniformity and defect density. To prevent recessed defects caused by foreign matter in slurry, filtration systems with pore sizes of 0.5–5 μm are installed in supply pipes, with filter housings and downstream piping fabricated from water-repellent resins (fluoropolymers or hydrophobic-treated polyolefins) to minimize particle adhesion and biofilm formation 2. Multiple slurry supply holes (typically 4–12 holes per polishing plate) are distributed across the platen surface to ensure uniform slurry distribution, with hole diameters of 3–10 mm and flow rates of 50–200 mL/min per hole 2,3.
## Process Parameter Optimization And Quality Control For Double Side Polished Glass Substrate
Achieving target specifications for double side polished glass substrates requires precise control of multiple interdependent process parameters. Polishing pressure distribution is a primary variable, with conventional flat-platen designs applying uniform pressure across the substrate surface. However, for applications demanding extreme flatness (such as EUVL reticle substrates with flatness <30 nm), modified platen geometries are employed 8,13. One approach utilizes upper and lower polishing plates with center regions recessed by 40–50 μm relative to peripheral regions, creating a pressure differential that applies 20–40% higher pressure to the substrate center compared to edges 8. This compensates for the natural tendency of carrier rotation to produce preferential edge polishing, reducing total thickness variation (TTV) from typical values of 0.5–1.0 μm to <0.3 μm across 150–200 mm diameter substrates 8.
Rotational speeds of polishing plates and carriers are optimized to balance MRR with surface quality. Typical operating ranges include lower platen rotation of 20–60 rpm, upper platen rotation of 0–40 rpm (or fixed position), and carrier rotation of 10–30 rpm 3,7. The relative velocity between polishing pad and substrate surface, calculated from these rotational speeds and radial position, typically ranges from 0.3 to 1.5 m/s, with higher velocities increasing MRR but potentially elevating defect generation rates 7. For rectangular substrates used in LCD applications, specialized polishing apparatus employ circular polishing pads with diameters ≥50% of the substrate short-side dimension, moving along rectangular paths with step distances <80% of pad diameter to ensure complete coverage while minimizing edge effects 11.
### Temperature And Environmental Control
Thermal management during double-side polishing significantly impacts dimensional stability and surface quality. Frictional heating from the polishing process can elevate substrate temperatures by 10–30°C above ambient, inducing thermal expansion (coefficient ~9×10⁻⁶ /°C for soda-lime glass, ~5×10⁻⁷ /°C for fused silica) that affects in-process thickness measurements and post-polishing dimensional accuracy 17. Advanced systems incorporate temperature-controlled slurry delivery (maintained at 20–25°C ±1°C) and platen cooling systems (circulating water or glycol at 18–22°C) to limit substrate temperature rise to <5°C 2,15. For precision applications, polishing is conducted in cleanroom environments (ISO Class 5–7) with controlled temperature (22±1°C) and relative humidity (45±5%) to minimize particle contamination and ensure consistent slurry behavior 15.
Real-time thickness monitoring enables closed-loop process control. Optical thickness measurement systems employing laser interferometry are integrated into polishing apparatus, with measurement windows formed in the upper polishing plate to allow laser beam transmission 17. These systems emit laser beams (typically 670–780 nm wavelength) through the window, receive reflected beams from upper and lower substrate surfaces, and calculate thickness from the optical path difference with resolution of ±0.1 μm and measurement frequency of 1–10 Hz 17. This enables dynamic adjustment of polishing pressure and duration to achieve target thickness uniformity, reducing TTV to <0.2 μm for 200 mm diameter substrates 17.
## Surface Quality Enhancement And Defect Mitigation Strategies For Double Side Polished Glass Substrate
Surface defects in double side polished glass substrates—including scratches, pits, particles, and residual subsurface damage—critically impact yield in downstream applications such as photomask fabrication and display panel production. Defect generation mechanisms include abrasive particle agglomeration, pad debris, slurry contamination, and mechanical damage from carrier contact 2,15. To minimize particle-induced defects, mist generation nozzles are integrated into polishing apparatus to spray fine water mist (droplet size 5–50 μm) onto substrate surfaces during polishing, creating a hydrodynamic barrier that prevents airborne particle deposition and facilitates removal of loosely adhered debris 15. This technique reduces surface defect density from typical values of 0.5–2.0 defects/cm² to <0.1 defects/cm² for critical applications 15.
Post-polishing cleaning protocols are equally critical. Immediately following polishing, substrates undergo multi-stage cleaning including: (1) high-pressure water rinse (1–3 MPa) to remove bulk slurry residue; (2) ultrasonic cleaning in alkaline detergent solution (pH 10–12, 40–60°C, 3–10 minutes) to dissolve organic contaminants and disperse particles; (3) megasonic cleaning in deionized water (0.8–1.2 MHz, 5–15 minutes) to remove submicron particles from surface pores; and (4) spin-rinse-dry cycle with heated nitrogen gas (80–120°C) to prevent water spot formation 1,15. For substrates requiring ultra-clean surfaces (particle density <0.01 particles/cm² for particles >0.1 μm), additional cleaning steps include ozone water treatment (dissolved ozone 5–20 ppm, 5 minutes) for organic removal and hydrophilic surface conditioning 15.
### Edge Quality And Chamfering Considerations
Edge defects—including chips, microcracks, and excessive edge roll-off—represent a major yield loss mechanism in double side polished glass substrate manufacturing. To protect edges during polishing, masking techniques are employed where the outer peripheral region (typically 2–10 mm width) of each substrate is coated with a liquid-impermeable masking material (such as photoresist, wax, or elastomeric polymer) that also imparts mechanical strength 1. The masked substrates are then arranged vertically in carriers with spacing of 1–5 mm between adjacent substrates, immersed in chemical polishing solution (such as hydrofluoric acid mixtures or alkaline etchants), and subjected to controlled etching that polishes exposed central regions while protecting masked edges 1. Following polishing, substrates are supported on additional stages positioned inside the masking regions and cut using precision dicing saws to remove the masked peripheral areas, yielding substrates with pristine edges 1.
For substrates requiring beveled or chamfered edges (common in semiconductor and display applications), dedicated edge polishing operations are performed either before or after double-side polishing. Pre-chamfering involves grinding substrate edges at angles of 20–45° to widths of 0.1–0.5 mm using diamond grinding wheels (grit size #400–#2000), followed by edge polishing with cerium oxide or diamond slurries to achieve edge surface roughness Ra <50 nm 4. This edge treatment reduces stress concentration factors by 3–5× and improves mechanical strength, decreasing edge chip probability during handling and subsequent processing 4.
## Application-Specific Requirements For Double Side Polished Glass Substrate In Advanced Technologies
### Photomask And Reticle Substrate Applications
Double side polished glass substrates for photomask and reticle applications in semiconductor lithography demand the most stringent specifications in the industry. For advanced photomasks used in 7 nm node and below semiconductor manufacturing, substrate requirements include: flatness <30 nm over the entire substrate area (typically 152 mm × 152 mm × 6.35 mm), surface roughness Ra <0.3 nm, TTV <0.2 μm, and def
OrgApplication ScenariosProduct/ProjectTechnical Outcomes
AGC Inc.Extreme ultraviolet lithography (EUVL) photomask and reticle substrates for advanced semiconductor manufacturing at 7nm node and below requiring nanometer-level surface quality.EUVL Glass SubstrateAchieved flatness <30 nm using specialized two-layer polishing pads with compressibility-optimized design and water-repellent resin slurry delivery system preventing recessed defects from foreign matter contamination.
Shin-Etsu Handotai Co. Ltd.High-precision semiconductor silicon wafer production for integrated circuit manufacturing requiring ultra-clean surfaces and minimal surface defects.Double-Side Polished Silicon WaferHydrophobic metal carrier (contact angle ≥50°) with polishing cloths (contact angle ≥100°, compression rate ≥5.0%) achieving haze <0.1 ppm and defect density <0.01 defects/cm².
Asahi Glass Co. Ltd.Liquid crystal display (LCD) panel manufacturing requiring exceptional surface flatness and minimal defects across large-area glass substrates.LCD Glass SubstrateOptimized pad adsorption control (F1>F2-w×g relationship) with Shore A hardness ≤70 and surface roughness Ra ≤50 μm preventing substrate adhesion and surface undulation during double-side polishing.
Konica Minolta Inc.Hard disk drive (HDD) magnetic storage media substrates requiring exceptional planarity and minimal surface warping for high-density data recording.HDD Glass SubstrateColloidal silica polishing (15-90 nm particle size, surface density 10-500 particles/μm²) forming lubricating layer reducing fine warping to <10 nm over 50 mm span.
Sharp Corp.Photomask blanks for semiconductor lithography and display manufacturing requiring defect-free surfaces and protected edges for high-yield production.Photomask Glass SubstrateChemical polishing with liquid-impermeable edge masking and precision cutting achieving smooth surfaces with pristine edges while preventing breakage in batch processing.
Reference
  • Method for manufacturing polished glass substrate
    PatentInactiveJP2009234870A
    View detail
  • Double-sided polishing deice, method for manufacturing glass substrate, and method for manufacturing glass for mask blanks
    PatentActiveJP2023063897A
    View detail
  • Double-side polishing apparatus
    PatentActiveUS20120184190A1
    View detail
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