MAY 22, 202671 MINS READ
Gallium nitride and gallium oxide materials exhibit distinct physical and electronic properties that position them as superior alternatives to silicon and silicon carbide for electric vehicle power electronics. GaN possesses a bandgap of approximately 3.39 eV and a critical electric field of 3.3 MV/cm, enabling devices with shorter drift regions and significantly lower on-state resistance compared to silicon counterparts at equivalent breakdown voltages 8,9. The heterojunction structure formed between aluminum gallium nitride (AlGaN) and GaN layers naturally generates a two-dimensional electron gas (2DEG) at the interface, characterized by electron mobility exceeding 2000 cm²/V·s at room temperature 7,8. This high-mobility channel allows GaN transistors to achieve current densities above 1 A/mm while maintaining low conduction losses, critical for the high-power demands of EV traction inverters and DC-DC converters 13,16.
Gallium oxide represents an even more advanced material platform, with its ultra-wide bandgap ranging from 4.5 to 4.9 eV and breakdown field strength reaching 6–8 MV/cm 3,14. The Baliga Figure of Merit (BFOM) for Ga₂O₃ substantially exceeds that of both GaN and SiC, indicating superior theoretical performance for high-voltage switching applications 14. Specifically, β-Ga₂O₃, the most thermodynamically stable polymorph, can be grown using relatively simple and cost-effective methods including melt-growth techniques and epitaxial deposition processes such as atomic layer deposition (ALD) 17. Recent developments have demonstrated large-area Ga₂O₃ substrates and epitaxial wafers suitable for vertical device architectures including Fin-FETs and current aperture FETs (CAVETs), which show exceptional promise for power modules operating above 1200 V 3,14.
The temperature tolerance of gallium-based materials provides significant advantages for EV applications where power devices must operate reliably across wide thermal ranges (-40°C to 150°C or higher). GaN devices maintain stable electrical characteristics at junction temperatures exceeding 200°C, reducing or eliminating the need for active cooling systems and enabling more compact power module designs 13,16. Gallium oxide's wide bandgap confers even greater intrinsic temperature stability, though thermal management remains a consideration due to Ga₂O₃'s relatively low thermal conductivity (approximately 27 W/m·K for β-Ga₂O₃) compared to SiC (approximately 490 W/m·K) 3,14. Innovative device structures incorporating heterogeneous substrates with high thermal conductivity (such as diamond or copper) bonded to Ga₂O₃ active layers have been developed to address this limitation, achieving improved heat dissipation while preserving the material's electrical advantages 12.
Vertical GaN device architectures offer significant advantages over lateral configurations for high-current EV applications, including reduced chip area, improved current distribution, and enhanced thermal management. A key innovation in vertical GaN power devices involves controlled breakdown voltage engineering through selective ion implantation 1. This fabrication method includes providing a first GaN material layer with n-type conductivity, forming a second p-type GaN layer to create a p-n junction, and then implanting ions (typically silicon or germanium for n-type doping) through the p-type layer into specific regions of the underlying n-type material 1. The implanted regions exhibit increased n-type doping concentration, resulting in localized areas with reduced breakdown voltage compared to non-implanted junction regions 1. This controlled breakdown approach enables designers to predetermine current paths during device operation and protect sensitive areas from excessive electric field stress, thereby improving device reliability and yield in high-volume manufacturing 1.
The fabrication of vertical GaN devices typically begins with a GaN substrate (either bulk GaN or thick GaN layers grown on foreign substrates such as sapphire or silicon), followed by epitaxial growth of a nucleating layer, buffer layer, channel layer, and barrier layer in sequence 5,6. For power diodes and transistors, the barrier layer commonly comprises AlGaN with aluminum composition ranging from 15% to 30%, optimized to generate sufficient 2DEG density (typically 1–2 × 10¹³ cm⁻²) while maintaining acceptable interface quality 6,7. Passivation layers, usually silicon nitride (Si₃N₄) or aluminum oxide (Al₂O₃) deposited by plasma-enhanced chemical vapor deposition (PECVD) or atomic layer deposition (ALD), protect the device surface and help manage electric field distribution near critical regions such as gate edges 6,11.
Recent developments in GaN power device technology emphasize monolithic integration of driver circuits with main power switches to minimize parasitic inductances, reduce switching losses, and improve overall system efficiency 8,9. A representative integrated power circuit comprises a heterojunction GaN chip containing at least one main power device (with source, drain, and gate terminals) and an integrated driver circuit featuring both low-side and high-side components 8,9. The low-side driver component, which discharges the input capacitance of the main power device during turn-off, is monolithically integrated within the GaN chip itself, leveraging the same AlGaN/GaN heterostructure technology 8,9. This integration eliminates external gate driver components and associated interconnect parasitics, enabling switching frequencies exceeding 1 MHz with reduced electromagnetic interference (EMI) 8,9.
The high-side driver component, responsible for charging the main device's input capacitance during turn-on, is typically formed in a semiconductor region comprising a material other than GaN—commonly silicon CMOS technology—due to the challenges of implementing high-voltage level-shifting circuits in GaN 8,9. This mixed-material approach combines the superior switching performance of GaN power devices with the mature, cost-effective processing of silicon control circuits 8,9. For EV applications, such integrated power modules can achieve power densities exceeding 50 kW/L while maintaining conversion efficiencies above 98.5% across wide load ranges, critical for maximizing vehicle range and minimizing battery thermal management requirements 13.
To meet the high current demands of EV traction inverters (typically 200–400 A continuous, with peak currents exceeding 600 A), GaN power devices are often configured in parallel arrays on a single chip 7,18. A representative chip architecture includes a substrate (commonly silicon for cost-effectiveness, though SiC and sapphire substrates offer superior thermal performance) with multiple GaN components arranged in a regular array pattern 7,18. Each GaN component comprises an active region containing the AlGaN/GaN heterojunction and a surrounding non-active region 7. The non-active region incorporates multiple grooves spaced at regular intervals (typically 5–20 μm apart) that penetrate through the GaN layer stack to expose the underlying substrate, effectively isolating adjacent GaN components and preventing electrical crosstalk 7.
This island topology approach offers several advantages for high-current applications: (1) improved current distribution uniformity across the chip area, reducing localized heating and enhancing device reliability; (2) elimination of traditional dicing-induced damage, as the isolation grooves can be formed by dry etching processes (such as inductively coupled plasma reactive ion etching) prior to wafer separation, avoiding mechanical stress and edge defects 7,18; (3) increased packing density, as the isolation grooves occupy minimal area compared to conventional dicing streets (typically 50–100 μm wide) 18. For a 10 mm × 10 mm GaN chip designed for 100 A operation, the island topology can increase the effective active area by 15–25% compared to traditional layouts, directly translating to reduced on-resistance and improved thermal performance 18.
Vertical gallium oxide power devices represent the next generation of ultra-high-voltage switches for applications including 800 V and 1200 V EV battery systems, solid-state transformers, and grid-interface converters 3,12. A key innovation in vertical Ga₂O₃ device fabrication involves replacing the conventional unintentionally doped (UID) gallium oxide growth substrate with a heterogeneous substrate possessing both high electrical conductivity and high thermal conductivity 12. The fabrication process begins with growing a thick, lightly doped Ga₂O₃ drift layer (typically 5–20 μm thick with doping concentration of 1–5 × 10¹⁵ cm⁻³) on a temporary growth substrate 12. This drift layer is then subjected to surface treatment (such as chemical-mechanical polishing to achieve surface roughness below 0.5 nm RMS) and bonded to the heterogeneous substrate using techniques such as surface-activated bonding or metal-mediated bonding 12.
Following bonding, the original growth substrate is removed through mechanical grinding and selective chemical etching, leaving the Ga₂O₃ drift layer attached to the heterogeneous substrate 12. Ion implantation (typically using silicon ions at energies of 50–200 keV and doses of 1–5 × 10¹⁴ cm⁻²) is then performed to create a highly doped n⁺ contact layer (doping concentration exceeding 1 × 10¹⁸ cm⁻³) at the top surface of the drift layer 12. The resulting structure comprises, from bottom to top: the heterogeneous substrate (which may be heavily doped n-type SiC, diamond, or copper), the lightly doped Ga₂O₃ drift layer, and the highly doped Ga₂O₃ contact layer 12. This configuration enables the drift layer to support high breakdown voltages (exceeding 3 kV for 10 μm thickness) while the heterogeneous substrate provides efficient heat extraction and low-resistance electrical contact to the device cathode 3,12.
Gallium oxide rectifiers represent critical components for EV power conversion systems, offering advantages over conventional silicon and SiC diodes including higher breakdown voltage capability and lower reverse leakage current 14. A planar MOS-Schottky rectifier structure addresses the challenge of achieving low on-resistance in forward bias while maintaining low leakage current in reverse bias, despite the absence of p-type doping capability in Ga₂O₃ 14. The device structure incorporates a lightly doped n-type Ga₂O₃ drift region (typical doping: 2–8 × 10¹⁵ cm⁻³) with a Schottky metal contact (commonly nickel, platinum, or palladium with work functions of 5.0–5.6 eV) forming the anode 14. Between the Schottky contact and the drift region, a thin dielectric layer (typically 5–20 nm of Al₂O₃ or HfO₂ deposited by ALD) is inserted in a metal-oxide-semiconductor (MOS) configuration 14.
This MOS-Schottky hybrid structure provides several performance benefits: (1) the thin oxide layer modulates the effective barrier height at the metal-semiconductor interface, reducing reverse leakage current by 2–3 orders of magnitude compared to pure Schottky contacts while maintaining low forward voltage drop (typically 0.8–1.2 V at 100 A/cm²) 14; (2) the oxide layer spreads the electric field at the contact edge during reverse bias, increasing breakdown voltage by 20–40% compared to conventional Schottky diodes 14; (3) the structure avoids the need for p-type regions, which cannot be reliably formed in Ga₂O₃ due to self-trapping of holes 14. For EV applications requiring 1200 V blocking capability, planar Ga₂O₃ MOS-Schottky rectifiers can achieve specific on-resistance below 2 mΩ·cm², representing a 3–5× improvement over equivalent-voltage SiC Schottky diodes 14.
Gallium nitride power devices for high-voltage EV applications (600 V and above) require careful electric field management to prevent premature breakdown at the gate edge near the drain terminal 11. Advanced device designs incorporate field plate structures and engineered stress layers to redistribute electric field and increase breakdown voltage without proportionally increasing on-resistance 11. A representative structure includes a substrate with epitaxial GaN layers, gate electrode, source and drain contacts, and a first dielectric layer comprising both compressive-stress and tensile-stress sublayers 11. The compressive-stress sublayer (typically silicon nitride deposited at high temperature or with high RF power, resulting in intrinsic compressive stress of 500–2000 MPa) is positioned closest to the GaN surface and extends from the gate edge toward the drain 11.
Above the compressive-stress layer, a tensile-stress sublayer (typically silicon nitride deposited at lower temperature or with adjusted gas flow ratios, resulting in intrinsic tensile stress of 200–1000 MPa) is formed with a width that gradually changes along the gate-to-drain direction 11. This engineered stress distribution modulates the piezoelectric polarization in the underlying AlGaN barrier layer, locally depleting the 2DEG channel and effectively spreading the electric field over a larger distance 11. Experimental results demonstrate that optimized stress-engineered field plate structures can increase breakdown voltage from approximately 650 V to over 900 V for devices with 15 μm gate-to-drain spacing, while maintaining on-resistance below 12 mΩ·cm² 11. The stress layer widths are typically designed to change linearly or in stepped fashion over distances of 5–10 μm, with the compressive layer width ranging from 2–6 μm and the tensile layer width ranging from 3–8 μm 11.
Electric vehicle traction inverters represent the most demanding application for gallium-based power devices, requiring simultaneous optimization of efficiency, power density, thermal management, and electromagnetic compatibility 13. A representative high-efficiency power conversion module for EV drive trains incorporates GaN power switches in a three-phase bridge configuration, with each phase leg comprising two GaN transistors (typically 650 V or 1200 V rated devices with on-resistance of 10–50 mΩ depending on current rating) operating in complementary switching mode 13. The module design emphasizes minimization of parasitic inductances through careful layout of power loop paths, with total loop inductance typically maintained below 10 nH to enable switching rise/fall times under 20 ns and switching frequencies of 50–100 kHz 13.
Advanced thermal management strategies are essential for achieving the target power density of 50–100 kW/L while maintaining junction temperatures below 150°C under continuous operation 13. Double-sided cooling approaches, where both the top and bottom surfaces of the power module are coupled to liquid cooling channels, can achieve thermal resistances below 0.2 K/W for a complete three-phase inverter module rated at 150 kW 13. The use of GaN devices enables reduction of cooling system size and weight by 30–40% compared to equivalent silicon IGBT-based inverters, due to the combination of higher switching frequency (allowing smaller passive components) and higher efficiency (reducing heat generation) 13. System-level efficiency measurements demonstrate that GaN-based traction inverters can achieve peak efficiencies exceeding 99% and maintain efficiencies above 97% across load ranges from 20% to 100% of rated power, directly contributing to extended EV driving range 13.
Electric vehicle onboard chargers (OBCs) convert AC power from the electrical grid to DC power for battery charging, with typical power levels
| Org | Application Scenarios | Product/Project | Technical Outcomes |
|---|---|---|---|
| AVOGY INC. | High-voltage power conversion systems in electric vehicles requiring reliable breakdown characteristics and protection from excessive electric field stress in traction inverters and battery management systems. | Vertical GaN Power Diodes | Controlled breakdown voltage through selective ion implantation enables predetermined current paths and improved device reliability with reduced breakdown voltage in specific regions for high-volume manufacturing. |
| Cambridge GaN Devices Limited | Electric vehicle drive trains and onboard charging systems requiring compact high-efficiency power conversion with minimized parasitic inductances and wide load range operation. | Integrated GaN Power Modules | Monolithically integrated low-side driver within GaN chip eliminates external gate driver parasitics, enabling switching frequencies exceeding 1 MHz with reduced EMI and conversion efficiencies above 98.5%. |
| Shanghai Institute of Microsystem and Information Technology Chinese Academy of Sciences | Ultra-high-voltage electric vehicle battery systems (800V-1200V), solid-state transformers, and next-generation power electronics requiring extreme voltage handling and thermal management capabilities. | Vertical Ga2O3 Power Devices | Ultra-wide bandgap (4.5-4.9 eV) with breakdown field strength of 6-8 MV/cm and heterogeneous substrate bonding achieves breakdown voltages exceeding 3 kV with efficient heat extraction and specific on-resistance below 2 mΩ·cm². |
| Huawei Digital Power Technologies Co. Ltd. | High-current electric vehicle traction inverters (200-400A continuous, 600A peak) requiring parallel device configurations with superior thermal performance and reliability. | GaN Chip Arrays | Island topology with isolation grooves increases effective active area by 15-25% compared to traditional layouts, improving current distribution uniformity and reducing on-resistance for 100A operation while eliminating dicing-induced damage. |
| Xiamen Sanan Integrated Circuit Co. Ltd. | High-voltage electric vehicle power electronics (600V and above) including DC-DC converters and charging infrastructure requiring enhanced breakdown voltage without proportional increase in conduction losses. | Field Plate GaN Power Transistors | Stress-engineered field plate structures with compressive and tensile dielectric layers increase breakdown voltage from 650V to over 900V while maintaining on-resistance below 12 mΩ·cm² through optimized electric field distribution. |