Gallium Nitride Passivation Layer: Advanced Surface Engineering For High-Performance GaN Devices

Fundamental Role And Mechanisms Of Gallium Nitride Passivation Layer In Device Performance

The gallium nitride passivation layer serves as an essential dielectric interface that directly addresses surface trap states inherent to GaN epitaxial structures, which arise from dangling bonds, lattice defects, and environmental exposure during fabrication 1. Surface traps at the AlGaN barrier interface can deplete the two-dimensional electron gas channel, increasing access resistance and causing dynamic on-resistance degradation commonly referred to as current collapse or drain lag 14,15. Passivation layers mitigate these effects through multiple mechanisms: physical encapsulation prevents atmospheric oxidation and moisture ingress 1; dielectric polarization compensates surface charge and modulates electric field distribution 14; and lattice-matched crystalline passivation (such as AlN grown by atomic layer epitaxy) introduces compressive strain that enhances piezoelectric polarization in the AlGaN barrier, thereby increasing 2DEG sheet carrier density 14.

Silicon nitride (SiNx) deposited by plasma-enhanced chemical vapor deposition (PECVD) has been the conventional passivation material, yet hydrogen incorporation during PECVD can introduce additional trap states and degrade long-term reliability 17,19. Advanced approaches employ hydrogen-free sputtered silicon nitride followed by CVD encapsulation to combine passivation benefits with robust environmental barriers 17,19. Thermally deposited dense silicon nitride, grown in situ within the epitaxial growth chamber immediately after AlGaN barrier formation, prevents surface oxidation and preserves pristine interface quality 1. High-temperature silicon nitride (HT-SiNx) formed at elevated substrate temperatures exhibits superior crystallinity, reduced defect density, and minimal drain lag, maintaining protective coverage throughout subsequent device processing 15.

Aluminum nitride passivation layers grown by atomic layer epitaxy (ALE) at temperatures between 300°C and 850°C provide lattice-matched interfaces with AlGaN barriers, minimizing interface state density and enabling higher 2DEG mobility 14. The AlN layer also functions as a thermal spreader due to its high thermal conductivity (approximately 285 W/m·K), facilitating heat dissipation from the channel region during high-power operation 14. Alternative passivation materials include aluminum oxide (Al₂O₃), silicon dioxide (SiO₂), and aluminum carbide, selected based on dielectric constant, breakdown field, thermal stability, and compatibility with gate dielectric integration 3,4,5,7.

Material Composition And Structural Characteristics Of Gallium Nitride Passivation Layer

Silicon Nitride Passivation: Composition, Deposition, And Hydrogen Management

Silicon nitride remains the most widely deployed passivation material for GaN devices due to its moderate dielectric constant (εᵣ ≈ 7–8), high breakdown field (>5 MV/cm), and process compatibility 1,15,17,19. Conventional PECVD silicon nitride deposited at 250–350°C incorporates significant hydrogen content (10–25 at.%), which can passivate some interface states but also introduces N-H and Si-H bonds that act as charge traps under bias and temperature stress 17,19. Hydrogen-free sputtered silicon nitride, deposited by reactive RF magnetron sputtering in nitrogen ambient at substrate temperatures of 200–400°C, eliminates hydrogen-related traps and exhibits improved stability 17,19. A dual-layer architecture—sputtered SiNx (50–100 nm) for interface passivation followed by PECVD SiNx (100–200 nm) for environmental sealing—combines the benefits of both techniques 17,19.

High-temperature silicon nitride (HT-SiNx) deposited in situ within the MOCVD or MBE growth chamber at substrate temperatures of 550–850°C immediately after AlGaN barrier growth prevents surface oxidation and achieves near-stoichiometric Si₃N₄ composition with minimal defects 1,15. This in-situ passivation preserves the pristine AlGaN surface, reducing interface state density (Dᵢₜ) from >10¹³ cm⁻²eV⁻¹ (unpassivated) to <5×10¹² cm⁻²eV⁻¹ 15. The HT-SiNx layer thickness typically ranges from 10 to 50 nm, sufficient to provide surface charge compensation without excessive capacitive loading 1,15. Selective etching of HT-SiNx for source/drain ohmic contact formation or gate recess is performed using fluorine-based dry etching (SF₆/O₂ plasma) or wet etching in dilute hydrofluoric acid 15.

Aluminum Nitride And Crystalline Passivation: Lattice Matching And Strain Engineering

Aluminum nitride passivation layers offer superior lattice matching to AlGaN barriers (lattice mismatch <2.5%) compared to amorphous silicon nitride, enabling epitaxial or quasi-epitaxial growth with minimal interface defects 14. AlN grown by atomic layer epitaxy (ALE) at 550°C achieves high crystallinity through layer-by-layer deposition, with typical growth rates of 0.1–0.3 nm/cycle using trimethylaluminum (TMAl) and ammonia (NH₃) precursors 14. The AlN passivation layer thickness ranges from 2 to 10 nm, sufficient to passivate surface states while maintaining low gate-to-channel capacitance 14. Post-deposition annealing at 600–800°C in nitrogen ambient further improves crystallinity and reduces oxygen contamination 14.

The lattice-matched AlN layer introduces compressive strain in the underlying AlGaN barrier, enhancing piezoelectric polarization and increasing 2DEG sheet carrier density by 10–20% compared to unpassivated or SiNx-passivated devices 14. This strain-induced enhancement is quantified by measuring the shift in AlGaN barrier thickness-dependent 2DEG density: passivated devices exhibit sheet carrier densities of 1.0–1.2×10¹³ cm⁻² for 25 nm Al₀.₂₅Ga₀.₇₅N barriers, compared to 0.8–1.0×10¹³ cm⁻² for unpassivated structures 14. The AlN passivation layer also serves as a gate dielectric in metal-insulator-semiconductor HEMTs (MIS-HEMTs), reducing gate leakage current by 2–3 orders of magnitude and improving threshold voltage stability 14.

Crystalline silicon nitride passivation with controlled hexagonal periodic arrangement of silicon and nitrogen atoms has been demonstrated to prevent oxidation and enable subsequent epitaxial regrowth without empirical optimization of nanoporous layer parameters 8,13. This crystalline passivation layer, deposited by low-pressure chemical vapor deposition (LPCVD) at 700–850°C using dichlorosilane (SiH₂Cl₂) and ammonia, exhibits (0001)-oriented growth on GaN surfaces with reduced dislocation density propagation 8,13. The crystalline SiNx layer thickness ranges from 5 to 20 nm, and the structure can be stored in ambient conditions for extended periods without surface degradation, facilitating multi-step device fabrication 8,13.

Aluminum Oxide, Gallium Oxide, And Emerging Passivation Materials

Aluminum oxide (Al₂O₃) deposited by atomic layer deposition (ALD) at 200–300°C using trimethylaluminum and water vapor provides excellent interface quality with low Dᵢₜ (<3×10¹² cm⁻²eV⁻¹) and high dielectric constant (εᵣ ≈ 9) 3,5,9. Al₂O₃ passivation layers with thickness of 10–30 nm are commonly employed in enhancement-mode GaN HEMTs with p-GaN gate structures, where the Al₂O₃ layer prevents oxidation of the p-GaN layer and provides lateral isolation between source/drain contacts and the gate region 9. The Al₂O₃ passivation extends between source and p-GaN, and between drain and p-GaN, reducing leakage paths at high voltage 9.

Gallium oxide (Ga₂O₃) passivation layers deposited on GaN buffer layers address thermal management challenges in high-power devices 3,5. The Ga₂O₃ layer (50–200 nm thick) can be deposited by mist chemical vapor deposition (mist-CVD) or pulsed laser deposition (PLD) at 400–600°C, either in direct contact with the GaN buffer or on an intermediate Al₂O₃/SiO₂/SiNx passivation layer 3,5. The Ga₂O₃ passivation prevents oxidation of the underlying GaN and provides improved adhesion for subsequent metallization 3,5. Selective placement of Ga₂O₃ is achieved through lithography-defined openings in the passivation layer, enabling localized thermal management or field plate integration 3,5.

Fluorine-based surface passivation using nitrogen trifluoride (NF₃) or nitrosyl fluoride (FNO) at low temperatures (150–300°C) in the presence of a platinum catalyst layer promotes fluorination of the GaN surface, passivating gallium vacancies and nitrogen dangling bonds without high-energy plasma damage 12. This chemical passivation approach reduces interface state density and improves device stability under bias-temperature stress 12.

Deposition Methodologies And Process Integration For Gallium Nitride Passivation Layer

In-Situ Passivation In Epitaxial Growth Chambers

In-situ passivation immediately following AlGaN barrier growth prevents surface oxidation and contamination, preserving the pristine interface quality essential for low-trap-density operation 1. The passivation layer is deposited within the same MOCVD or MBE chamber used for GaN epitaxial growth, eliminating air exposure between barrier formation and passivation 1. For silicon nitride passivation, the substrate temperature is reduced from the AlGaN growth temperature (1000–1100°C) to the SiNx deposition temperature (550–850°C) under ammonia overpressure to prevent surface decomposition 1. Dichlorosilane (SiH₂Cl₂) or silane (SiH₄) is introduced with ammonia to deposit thermally grown SiNx at rates of 1–5 nm/min 1. The in-situ SiNx layer thickness is typically 10–50 nm, sufficient for surface passivation while allowing subsequent selective etching for contact formation 1.

For AlN passivation, the substrate temperature is maintained at 600–850°C, and trimethylaluminum is introduced with ammonia in pulsed mode (ALE) or continuous mode (MOCVD) to deposit 2–10 nm of AlN 14. The in-situ AlN layer exhibits epitaxial registry with the underlying AlGaN barrier, minimizing interface state density 14. Post-growth cooling is performed under ammonia overpressure to prevent nitrogen desorption from the AlN surface 14.

Ex-Situ Passivation: PECVD, Sputtering, And Atomic Layer Deposition

Ex-situ passivation is performed after device structure definition (mesa isolation, ohmic contact formation) and before or after gate metallization 15,17,19. Plasma-enhanced chemical vapor deposition (PECVD) of silicon nitride at 250–350°C using silane and ammonia or nitrogen plasma is the most common ex-situ passivation method, offering high deposition rates (10–50 nm/min) and conformal coverage over topography 15. However, PECVD introduces hydrogen and plasma-induced damage, necessitating post-deposition annealing at 400–500°C in nitrogen to reduce trap density 15.

Hydrogen-free sputtered silicon nitride is deposited by RF magnetron sputtering of a silicon target in nitrogen ambient at substrate temperatures of 200–400°C and RF power of 200–500 W 17,19. The sputtered SiNx layer (50–100 nm) exhibits lower hydrogen content (<1 at.%) and improved stability compared to PECVD SiNx 17,19. A subsequent PECVD SiNx layer (100–200 nm) provides environmental sealing and mechanical protection 17,19.

Atomic layer deposition (ALD) of Al₂O₃ or AlN at 200–300°C provides precise thickness control (±0.5 nm) and excellent conformality, critical for passivation of high-aspect-ratio gate recesses or field plate structures 3,5,9. ALD Al₂O₃ is deposited using trimethylaluminum and water vapor in sequential pulsed exposures, achieving growth rates of 0.1–0.15 nm/cycle 9. The low deposition temperature minimizes thermal budget and prevents degradation of pre-existing ohmic contacts 9.

Selective Passivation And Patterning For Multi-Region Devices

Advanced GaN power devices employ composite passivation structures with different materials in gate, access, and field plate regions to optimize electric field distribution and minimize capacitance 2,7. Selective passivation is achieved through lithography-defined etching of the first passivation layer followed by deposition of a second passivation material 2. For example, a thin Al₂O₃ layer (10 nm) is deposited by ALD over the entire device, then selectively etched in the access regions and replaced with thicker SiNx (100 nm) to reduce gate-drain capacitance while maintaining low interface state density under the gate 2.

In enhancement-mode GaN HEMTs with p-GaN gates, the passivation layer is deposited after p-GaN etching and gate metallization, covering the exposed AlGaN barrier in the access regions while leaving openings for source and drain contacts 4,7. The passivation layer (SiNx or Al₂O₃, 50–150 nm thick) provides stress to the AlGaN barrier, promoting regeneration of the 2DEG channel in the non-gate regions and reducing access resistance 4,7. The gate structure may include a T-shaped configuration where the first gate metal penetrates the passivation layer and the second gate metal (field plate) extends laterally over the passivation surface toward the drain, modulating the electric field and increasing breakdown voltage 4,7.

Interface Physics And Charge Dynamics At Gallium Nitride Passivation Layer Boundaries

Surface State Density And Trap Characterization

Unpassivated AlGaN surfaces exhibit high interface state densities (Dᵢₜ > 10¹³ cm⁻²eV⁻¹) distributed across the bandgap, with peak densities near midgap and at the conduction band edge 14,15. These surface states arise from dangling bonds, point defects (nitrogen vacancies, gallium vacancies), and adsorbed species (oxygen, carbon) 12. Surface states trap electrons during device operation, depleting the 2DEG and increasing access resistance, manifesting as drain lag (slow recovery of drain current after voltage transients) and current collapse (reduction of maximum drain current under pulsed operation) 14,15.

Effective passivation reduces Dᵢₜ by 1–2 orders of magnitude through chemical bonding (Si-N bonds saturating Ga or Al dangling bonds) and electrostatic screening (dielectric polarization compensating surface charge) 14,15. Capacitance-voltage (C-V) measurements on metal-insulator-semiconductor (MIS) capacitors with various passivation layers quantify Dᵢₜ: AlN passivation achieves Dᵢₜ = 2–5×10¹² cm⁻²eV⁻¹, Al₂O₃ passivation achieves Dᵢₜ = 3–6×10¹² cm⁻²eV⁻¹, and optimized HT-SiNx achieves Dᵢₜ =