MAY 22, 202661 MINS READ
Gallium sheet material encompasses a family of semiconductor compounds based on gallium nitride (GaN) and its ternary/quaternary alloys including aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AlInGaN) 2,6. These materials are characterized by a wurtzite crystal structure with a relatively wide direct bandgap ranging from 0.7 eV (InN) to 6.2 eV (AlN), with binary GaN exhibiting a bandgap of approximately 3.4 eV at room temperature 3,14. The wide bandgap enables highly energetic electronic transitions, conferring exceptional properties including high electron mobility (>1500 cm²/V·s for two-dimensional electron gas in AlGaN/GaN heterostructures), high breakdown electric field (>3 MV/cm), and excellent thermal stability with operational temperatures exceeding 300°C 2,6,10.
The structural integrity of gallium sheet material is critically dependent on substrate selection and interfacial engineering. Gallium nitride exhibits a hexagonal wurtzite structure with lattice constants a = 3.189 Å and c = 5.185 Å, which presents significant lattice mismatch with common substrates: approximately 16% with sapphire, 3.5% with silicon carbide (SiC), and 17% with silicon (111) 3,14. This lattice mismatch, combined with thermal expansion coefficient differences (GaN: 5.59×10⁻⁶ K⁻¹ versus Si: 2.6×10⁻⁶ K⁻¹), generates substantial mechanical stress during epitaxial growth and subsequent cooling, leading to defect formation including threading dislocations (typical density 10⁸–10¹⁰ cm⁻²) and crack propagation in layers exceeding 0.5 μm thickness 3,14,17.
Recent innovations have introduced composite gallium sheet material architectures that mitigate these challenges. One notable approach involves epitaxial growth of crystalline GaN layers on expanded graphite sheets via metalorganic vapor phase epitaxy (MOVPE), creating a graphite-GaN composite structure 1. The expanded graphite substrate, with its layered structure and high in-plane thermal conductivity (>1500 W/m·K), provides both lattice accommodation through van der Waals epitaxy and superior heat dissipation pathways 1. Another advanced configuration employs gallium-nitride-on-handle substrate technology, where a thin transferred GaN layer (typically 0.5–5 μm) is bonded to a thermally conductive handle substrate (such as silicon carbide, copper, or diamond-coated silicon) with integrated thermal vias filled with conductive materials to enhance vertical heat extraction 4,12.
The compositional grading strategy represents a critical structural design principle for gallium sheet material on silicon substrates. Compositionally-graded transition layers, typically consisting of AlₓGa₁₋ₓN with aluminum content varying from x = 1.0 (pure AlN) at the substrate interface to x = 0 (pure GaN) at the device layer, are employed to gradually accommodate the lattice and thermal expansion mismatch 14,17. These transition layers, with thicknesses ranging from 0.5 to 3 μm and grading rates of 5–20% Al per micrometer, effectively distribute mechanical stress and reduce threading dislocation density to below 5×10⁸ cm⁻² 14. An amorphous silicon nitride-based interlayer (50–200 nm thick) deposited on silicon substrates prior to GaN growth serves as a strain-absorbing layer, further suppressing crack formation and improving crystalline quality 17.
The fabrication of gallium sheet material on expanded graphite substrates employs metalorganic vapor phase epitaxy (MOVPE), also known as metalorganic chemical vapor deposition (MOCVD), as the primary growth technique 1. The process begins with preparation of expanded graphite sheets through thermal treatment of intercalated graphite compounds at temperatures of 800–1000°C, resulting in accordion-like structures with interlayer spacing expanded from 3.35 Å to 6–10 Å and bulk density reduced to 0.01–0.1 g/cm³ 1. The expanded graphite substrate is then loaded into the MOVPE reactor and subjected to hydrogen plasma cleaning at 600–800°C for 10–30 minutes to remove surface contaminants and activate surface sites.
Epitaxial growth of crystalline GaN proceeds at substrate temperatures of 1000–1100°C under reactor pressures of 100–300 Torr 1. Trimethylgallium (TMGa) or triethylgallium (TEGa) serves as the gallium precursor with flow rates of 20–100 μmol/min, while ammonia (NH₃) provides the nitrogen source at flow rates of 1–5 slm, establishing a V/III ratio (ammonia-to-gallium precursor molar ratio) of 500–2000 1. Hydrogen or nitrogen carrier gas flows at 5–20 slm maintain uniform precursor distribution. The growth rate typically ranges from 0.5 to 3 μm/h, with layer thicknesses of 0.5–5 μm achieved in 10–60 minute deposition cycles 1. The resulting GaN layer exhibits wurtzite crystal structure with c-axis orientation perpendicular to the graphite basal plane, as confirmed by X-ray diffraction showing strong (0002) reflection peaks 1.
For gallium sheet material on silicon substrates, the synthesis process incorporates multiple buffer and transition layers to manage stress and defect propagation 14,17. Following substrate cleaning and native oxide removal via hydrofluoric acid treatment (1–5% HF for 30–120 seconds), an initial aluminum nitride (AlN) nucleation layer is deposited at 800–1000°C with thickness of 50–200 nm using trimethylaluminum (TMAl) and ammonia precursors at V/III ratios of 100–500 14,15. This AlN layer provides a lattice-matched template for subsequent GaN growth and prevents silicon outdiffusion.
The compositionally-graded AlₓGa₁₋ₓN transition layer is then grown by continuously varying the TMAl and TMGa flow rates while maintaining constant total group-III precursor flow 14. A typical grading profile starts with x = 0.8–1.0 at the AlN interface and decreases linearly or step-wise to x = 0 over a thickness of 0.5–3 μm, with growth temperatures of 1000–1100°C and growth rates of 0.3–1.5 μm/h 14. The grading rate (change in aluminum composition per unit thickness) critically influences stress management: slower grading rates (5–10% Al/μm) provide superior stress relief but require longer deposition times, while faster rates (15–25% Al/μm) reduce process time but may allow residual tensile stress accumulation 14.
An alternative approach employs an amorphous silicon nitride (SiNₓ) strain-absorbing layer deposited via low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced CVD (PECVD) at 300–800°C with thickness of 50–200 nm 17. This amorphous interlayer, with its lower elastic modulus (150–200 GPa) compared to crystalline materials, accommodates interfacial strain through viscoplastic deformation during subsequent high-temperature GaN growth 17. The SiNₓ layer is deposited using silane (SiH₄) and ammonia precursors with flow rate ratios of 1:5 to 1:20, resulting in nitrogen-rich compositions (x = 1.1–1.4) that optimize strain absorption 17.
Gallium-nitride-on-handle substrate technology employs layer transfer techniques to combine thin GaN device layers with thermally conductive handle substrates 4. The process begins with growth of a sacrificial release layer and device-quality GaN layer on a donor substrate (typically sapphire or bulk GaN wafer). For SmartCut™-based transfer, hydrogen or helium ions are implanted at energies of 50–200 keV and doses of 5×10¹⁶–5×10¹⁷ cm⁻² to create a buried damage layer at depths of 0.3–2 μm 4. The implanted donor wafer is then bonded to the handle substrate (such as silicon, silicon carbide, or copper) at room temperature or elevated temperatures (200–400°C) using direct wafer bonding, adhesive bonding with benzocyclobutene (BCB) or polyimide (bond layer thickness 0.5–5 μm), or metal-metal thermocompression bonding 4.
Thermal annealing at 200–600°C for 0.5–4 hours induces layer splitting at the implanted damage plane, transferring a thin GaN layer (0.3–2 μm) to the handle substrate 4. The transferred surface is then planarized via chemical-mechanical polishing (CMP) using colloidal silica slurries (pH 10–11) with removal rates of 50–200 nm/min to achieve surface roughness below 0.5 nm RMS 4. Thermal vias are subsequently formed by deep reactive ion etching (DRIE) through the handle substrate, creating cylindrical openings with diameters of 10–100 μm and depths of 50–500 μm, which are then filled with conductive materials (copper, tungsten, or silver-filled epoxy) via electroplating or paste dispensing to establish vertical thermal conduction paths 4,12.
Advanced gallium sheet material architectures employ selective area growth to produce dual-phase GaN structures with controlled crystallographic orientations 15. The process begins with deposition of a blanket silicon dioxide or silicon nitride dielectric layer (100–500 nm thick) on (100)-oriented silicon substrates via PECVD or thermal oxidation 15. Photolithography and reactive ion etching (RIE) using CF₄/O₂ or CHF₃/O₂ plasma (power 100–300 W, pressure 10–50 mTorr) pattern the dielectric into arrays of openings with dimensions of 1–50 μm 15.
Anisotropic wet etching of exposed silicon using potassium hydroxide (KOH) solution (20–40 wt%, 60–80°C) or tetramethylammonium hydroxide (TMAH) solution (5–25 wt%, 80–90°C) selectively removes silicon along crystallographic planes, creating V-shaped grooves with {111} sidewalls 15. The etch rate anisotropy between (100) and (111) planes (typically 100:1 for KOH) ensures formation of well-defined {111} facets 15. A contiguous AlN buffer layer (50–200 nm) is then deposited over the entire patterned surface via MOVPE at 800–1000°C, followed by GaN growth at 1000–1100°C 15. The GaN nucleates with (0001) orientation on {111} silicon facets within the grooves and with (11-22) semi-polar orientation on the dielectric sidewalls, creating a dual-phase structure with distinct crystallographic domains separated by the dielectric mask 15.
Gallium sheet material exhibits exceptional electrical transport properties that enable high-frequency and high-power device operation 2,6,10. The spontaneous and piezoelectric polarization fields at AlGaN/GaN heterointerfaces induce a two-dimensional electron gas (2DEG) with sheet carrier densities of 0.8–2.0×10¹³ cm⁻² and electron mobilities of 1200–2200 cm²/V·s at room temperature, without intentional doping 2,6. These values increase to 5000–10,000 cm²/V·s at 77 K due to reduced phonon scattering 6. The high electron mobility and saturation velocity (>2×10⁷ cm/s) enable cutoff frequencies (fₜ) exceeding 100 GHz and maximum oscillation frequencies (fₘₐₓ) above 200 GHz in optimized transistor structures with sub-100 nm gate lengths 2,6.
The wide bandgap of GaN (3.4 eV) confers a critical electric field strength of 3.3 MV/cm, approximately ten times higher than gallium arsenide (0.4 MV/cm) and three times higher than silicon carbide (1.2 MV/cm) 2,6. This high breakdown field allows gallium sheet material devices to operate at drain voltages exceeding 100 V while maintaining channel lengths below 1 μm, resulting in power densities of 5–40 W/mm for RF transistors operating at 2–40 GHz 2,6,10. The Johnson figure of merit (proportional to breakdown field times saturation velocity) for GaN is approximately 27.5 times that of silicon and 7.5 times that of GaAs, indicating superior potential for high-power, high-frequency applications 6.
Thermal management represents a critical consideration for gallium sheet material devices due to the high power densities involved 4,10,12. Bulk gallium nitride exhibits thermal conductivity of 130–230 W/m·K at room temperature, decreasing with increasing temperature (approximately 100 W/m·K at 400°C) 4,10. However, epitaxial GaN layers on foreign substrates typically show reduced thermal conductivity (80–150 W/m·K) due to phonon scattering at interfaces and from threading dislocations 10,12.
The thermal resistance of gallium sheet material device structures depends critically on substrate selection and thermal via implementation 4,12. Devices on silicon substrates (thermal conductivity 150 W/m·K) exhibit junction-to-case thermal resistances of 15–30 K·mm/W for 1 mm gate periphery transistors without thermal vias 12. Integration of copper-filled thermal vias (copper thermal conductivity 400 W/m·K) with diameters of 50–100 μm and pitch of 100–200 μm reduces thermal resistance to 5–12 K·mm/W 4,12. GaN-on-SiC structures (SiC thermal conductivity 370–490 W/m·K) achieve thermal resistances of 3–8 K·mm/W, while GaN-on-diamond configurations (diamond thermal conductivity 1000–2200 W/m·K) can reach values below 2 K·mm/W 4,12.
The graphite-GaN composite gallium sheet material offers unique thermal advantages due to the exceptional in-plane thermal conductivity of expanded graphite (1500–1950 W/m·K) 1. Although the through-thickness thermal conductivity of expanded graphite is lower (5–15 W/m·K) due to weak interlayer coupling, the high in-plane conductivity enables efficient lateral heat spreading, reducing peak junction temperatures by 20–40°C compared to GaN-on-silicon structures of equivalent geometry 1. Thermal interface resistance between GaN and graphite (typically 1–5×10⁻⁸ m²·K/W) remains a limiting factor, addressable through surface functionalization and optimized growth conditions 1.
The direct bandgap nature of gallium sheet material enables efficient light emission and absorption, with emission wavelengths tunable from deep ultraviolet (AlN, 210 nm) through blue-green (GaN,
| Org | Application Scenarios | Product/Project | Technical Outcomes |
|---|---|---|---|
| TOYO TANSO KK | High-power RF transistors, power electronics, and optoelectronic devices requiring superior thermal management and heat dissipation in compact form factors. | Expanded Graphite-GaN Composite Substrate | Crystalline GaN layer epitaxially grown on expanded graphite via MOVPE, achieving exceptional in-plane thermal conductivity (>1500 W/m·K) for efficient lateral heat spreading, reducing peak junction temperatures by 20-40°C compared to GaN-on-silicon structures. |
| NITRONEX CORPORATION | Wireless communications base stations, 3G/W-CDMA applications requiring high output power, linearity, gain and efficiency for RF signal transmission. | GaN RF Power Transistors | Source field plate design with AlGaN/GaN heterostructures providing 2DEG with sheet carrier density of 0.8-2.0×10¹³ cm⁻² and electron mobility of 1200-2200 cm²/V·s, enabling power densities of 5-40 W/mm at 2-40 GHz with cutoff frequencies exceeding 100 GHz. |
| SORAA INC. | High-power LED devices, solid-state lighting, and automotive electronics requiring enhanced thermal extraction and device reliability under high power density operation. | GaN-on-Handle Substrate with Thermal Vias | SmartCut layer-transfer technology bonding thin GaN layers (0.5-2 μm) to thermally conductive handle substrates (SiC, copper, diamond-coated silicon) with integrated thermal vias (10-100 μm diameter) filled with conductive materials, reducing thermal resistance to 5-12 K·mm/W. |
| NITRONEX CORPORATION | Cost-effective high-power electronics, RF amplifiers, and power conversion systems leveraging large-diameter silicon substrate manufacturing infrastructure. | GaN-on-Silicon with Compositionally-Graded Transition Layers | AlₓGa₁₋ₓN compositionally-graded transition layers (0.5-3 μm thickness) with aluminum content varying from x=1.0 to x=0, reducing threading dislocation density below 5×10⁸ cm⁻² and suppressing crack formation in GaN layers exceeding 0.5 μm thickness on silicon substrates. |
| INTERNATIONAL BUSINESS MACHINES CORPORATION | Integrated photonics, optoelectronic devices, and heterogeneous integration of GaN-based devices with silicon CMOS technology for advanced semiconductor applications. | Dual Phase GaN on (100) Silicon | Selective area growth producing dual-phase GaN structures with (0001) orientation on {111} silicon facets and (11-22) semi-polar orientation on dielectric sidewalls, enabling controlled crystallographic domains for enhanced device performance on standard silicon wafers. |