MAR 27, 202659 MINS READ
Gallium nitride substrate exhibits a wurtzite hexagonal crystal structure with lattice parameters a = 3.189 Å and c = 5.185 Å, providing the structural foundation for homoepitaxial growth of III-nitride semiconductor layers 1,7. The substrate's primary crystallographic orientations include the polar c-plane (0001), nonpolar a-plane (11-20) and m-plane (1-100), and semi-polar planes such as (11-22), each offering distinct advantages for specific device architectures 15. The c-plane orientation dominates commercial production due to its compatibility with metal-organic chemical vapor deposition (MOCVD) processes, though nonpolar and semi-polar orientations are increasingly investigated for reduced piezoelectric field effects in quantum well structures 14,15.
Key physical properties distinguishing gallium nitride substrate from heterogeneous alternatives include:
The coefficient of thermal expansion (CTE) for gallium nitride substrate measures 5.59×10⁻⁶ K⁻¹ parallel to the a-axis and 3.17×10⁻⁶ K⁻¹ parallel to the c-axis, closely matching epitaxial GaN layers to minimize thermally induced stress during device processing 2,6. This CTE compatibility represents a critical advantage over sapphire substrates (CTE = 7.5×10⁻⁶ K⁻¹), which introduce significant dislocation densities (10⁸-10¹⁰ cm⁻²) due to lattice and thermal mismatch 8,16.
Hydride vapor phase epitaxy remains the dominant industrial method for producing free-standing gallium nitride substrate with thicknesses ranging from 300 to 800 μm and diameters up to 155 mm 1,7. The HVPE process involves the reaction of gallium chloride (GaCl) vapor with ammonia (NH₃) at temperatures between 1,000°C and 1,100°C, typically on a sacrificial sapphire or GaN template substrate 17. Critical process parameters include:
Following HVPE deposition, the thick GaN layer is separated from the template substrate through laser lift-off (LLO) using 248 nm or 355 nm excimer lasers, mechanical polishing, or wet chemical etching in phosphoric acid at 160°C 2,6. Post-separation processing includes chemical-mechanical polishing (CMP) to achieve surface roughness <0.5 nm Ra and edge beveling at 5°-30° inclination angles to prevent chipping during device fabrication 7,15.
Ammonothermal synthesis represents an emerging technique for producing bulk gallium nitride substrate under supercritical ammonia conditions (450°-600°C, 100-400 MPa), analogous to hydrothermal quartz growth 14. This method enables growth of large-diameter (>100 mm) substrates with ultra-low dislocation densities (<10⁴ cm⁻²) by utilizing GaN seed crystals and mineralizers such as sodium amide or potassium amide 14. Growth rates typically range from 10 to 100 μm/day, with crystal quality approaching theoretical limits for threading dislocation density 1,14. The ammonothermal approach offers potential for cost reduction through elimination of template substrates and reduced post-growth processing requirements, though commercial scalability remains under development 6,14.
Epitaxial lateral overgrowth techniques employ patterned dielectric masks (typically SiO₂ or Si₃N₄) deposited on template substrates to selectively promote lateral crystal growth, effectively filtering threading dislocations propagating from the underlying heteroepitaxial interface 3,4. The ELO process for gallium nitride substrate fabrication involves:
ELO-based gallium nitride substrate demonstrates dislocation density reduction from 10⁸-10⁹ cm⁻² in masked regions to 10⁶-10⁷ cm⁻² in laterally overgrown regions, with further reduction to <10⁵ cm⁻² achievable through multiple ELO cycles 3,4. The lattice mismatch tolerance of this technique extends to substrates with mismatch rates between 2.2% and 49.4%, enabling GaN growth on alternative templates including silicon (17% mismatch) and zinc oxide (1.8% mismatch) 3,12.
An alternative cost-reduction strategy employs oriented polycrystalline sintered bodies as templates for gallium nitride substrate fabrication, addressing the economic barriers associated with large-area single crystal growth 2,6,13,16. This methodology comprises:
Substrates produced via this route exhibit single-crystal-like behavior in the growth direction while retaining polycrystalline grain boundaries in the lateral plane, with threading dislocation densities of 10⁶-10⁷ cm⁻² and electrical conductivity suitable for vertical device structures 2,6,13. The approach enables substrate diameters exceeding 150 mm at production costs 30%-50% lower than conventional HVPE single crystals 16.
Manganese (Mn) incorporation serves as the primary method for producing semi-insulating gallium nitride substrate required for high-frequency and high-power electronic devices 1. Manganese acts as a deep acceptor with ionization energy 1.8 eV above the valence band maximum, effectively compensating residual donors (oxygen, silicon) and achieving resistivities >10⁷ Ω·cm 1. Critical doping parameters include:
Manganese-doped gallium nitride substrate exhibits absorption coefficient <10 cm⁻¹ at 450 nm wavelength, maintaining optical transparency for LED applications while providing electrical isolation for lateral device structures 1. The Mn²⁺/Mn³⁺ charge state transition at mid-gap position ensures thermal stability of semi-insulating properties up to 600°C, critical for device processing compatibility 1.
N-type gallium nitride substrate utilizes silicon (Si) or oxygen (O) as shallow donors with ionization energies 15-30 meV, enabling room-temperature carrier concentrations from 2×10¹⁷ to 4×10¹⁸ cm⁻³ 7,10. Silicon doping via silane (SiH₄) introduction during HVPE growth provides precise concentration control with uniformity <5% across substrate diameter, while oxygen incorporation occurs unintentionally through residual water vapor or intentionally via nitrous oxide (N₂O) addition 7. Key electrical characteristics include:
The selection between silicon and oxygen doping depends on application requirements, with silicon preferred for power electronics due to lower compensation ratios and oxygen favored for optical devices where reduced free carrier absorption is critical 7,10.
Threading dislocation density represents the primary quality metric for gallium nitride substrate, directly impacting device performance through non-radiative recombination centers and reverse leakage current paths 1,7,15. State-of-the-art substrates achieve average dislocation densities of 1×10³ to 5×10⁷ cm⁻², with spatial distribution characterized by:
Characterization techniques include cathodoluminescence (CL) imaging at 5-10 keV beam energy to visualize dark spot defects, etch pit density (EPD) measurement following molten KOH etching at 400°C for 5-10 minutes, and X-ray diffraction rocking curve analysis with full-width-half-maximum (FWHM) values <50 arcsec for (0002) reflection and <200 arcsec for (10-12) reflection indicating high crystalline quality 1,7,15.
Surface quality of gallium nitride substrate critically influences epitaxial layer nucleation and device yield, with specifications including:
Plasma-based surface treatment using inductively coupled plasma (ICP) with fluorine-based chemistry (SF₆ or CF₄) at normalized DC bias <-10 V/cm² effectively removes polishing-induced damage while maintaining surface stoichiometry 5. Optimized plasma conditions include:
Post-plasma treatment, substrates undergo wet chemical cleaning in sulfuric acid-hydrogen peroxide mixture (H₂SO₄:H₂O₂ = 3:1) at 80°C for 10 minutes to remove residual fluorine and organic contaminants, followed by deionized water rinsing and nitrogen blow-dry 5.
Precise crystallographic orientation control ensures optimal epitaxial layer quality and device performance, with specifications including:
| Org | Application Scenarios | Product/Project | Technical Outcomes |
|---|---|---|---|
| SUMITOMO CHEMICAL COMPANY LIMITED | High-frequency and high-power electronic devices requiring electrical isolation, such as RF transistors and power amplifiers in telecommunications infrastructure. | Mn-doped GaN Single Crystal Substrate | Achieves semi-insulating properties with resistivity >10^7 Ω·cm through Mn concentration of 5×10^17 cm^-3 or more, with concentration uniformity within ±20% across 50mm+ diameter substrates, enabling high-frequency device isolation. |
| NGK Insulators Ltd. | Cost-sensitive high-volume LED manufacturing for solid-state lighting, automotive headlamps, and display backlighting applications requiring large substrate areas. | Free-standing GaN Substrate via Polycrystalline Sintering | Produces large-area substrates (>150mm diameter) at 30%-50% lower cost than conventional HVPE single crystals, with threading dislocation density of 10^6-10^7 cm^-2 and electrical conductivity suitable for vertical device structures. |
| DAINIPPON PRINTING CO LTD | Heterogeneous integration platforms for GaN-on-Silicon and GaN-on-alternative substrates, enabling cost-effective power electronics and RF devices with improved crystal quality. | ELO Crystal Growth Substrate with Triangular Lattice Mask | Enables GaN growth on substrates with lattice mismatch rates between 2.2% and 49.4%, reducing threading dislocation density from 10^8-10^9 cm^-2 to 10^6-10^7 cm^-2 through epitaxial lateral overgrowth without buffer layers. |
| Sumitomo Electric Industries Ltd. | High-brightness laser diodes for automotive LiDAR, projector systems, and high-power vertical-structure LEDs requiring superior thermal management and low defect density. | Low-dislocation GaN Crystal Substrate | Delivers substrates with 50-155mm diameter and average dislocation density of 1×10^3 to 5×10^7 cm^-2, with carrier concentration tunable from 2×10^17 to 4×10^18 cm^-3 and thermal conductivity 130-230 W/(m·K) for efficient heat dissipation. |
| TOKUYAMA CORPORATION | Advanced optoelectronic devices including green/yellow LEDs and laser diodes where reduced quantum-confined Stark effect is critical for improved emission efficiency and wavelength stability. | Nonpolar/Semi-polar GaN Substrate | Provides a-plane, m-plane, and semi-polar plane orientations with threading dislocation density ≤1.4×10^8 cm^-2, reducing piezoelectric field effects in quantum well structures for enhanced optical efficiency. |