MAR 27, 202656 MINS READ
Glass core substrate board technology fundamentally reimagines traditional organic laminate substrates by substituting polymer-based cores with engineered glass materials 1,2. The typical architecture comprises a central glass core layer (ranging from 50 μm to 500 μm thickness) with build-up structures on opposing surfaces 1. These build-up layers consist of alternating dielectric films (typically 10-30 μm per layer) and patterned copper circuitry (5-20 μm thickness), enabling multi-layer routing with line/space dimensions down to 2/2 μm 4.
The glass core itself may be constructed as:
The coefficient of thermal expansion (CTE) of borosilicate and aluminosilicate glasses used in these substrates typically ranges from 3.0 to 5.5 ppm/°C (20-260°C), closely matching silicon IC dies (2.6-3.2 ppm/°C) 8,14. This CTE matching minimizes thermomechanical stress during temperature cycling, reducing solder joint fatigue and warpage-induced failures compared to organic substrates with CTE values of 14-18 ppm/°C 3,16.
The glass materials employed in glass core substrate board applications must satisfy stringent requirements for electrical performance, mechanical strength, thermal stability, and processability 6,8. Primary glass compositions include:
The surface roughness of glass substrates is typically Ra < 5 nm, enabling ultra-fine-pitch circuitry formation without the "fiber weave effect" that plagues glass-reinforced epoxy laminates 8,11. This atomically smooth surface also facilitates reliable thin-film adhesion and reduces signal loss at high frequencies (>10 GHz) 6,13.
Glass core substrate board exhibits superior electrical properties critical for high-speed digital and RF applications:
For advanced applications requiring even lower Dk values, hollow glass fibers filled with low-Dk fluids (air, nitrogen, noble gases) or solid resins can achieve effective Dk values of 2.5-3.5, though manufacturing complexity increases significantly 13.
The mechanical robustness of glass core substrate board depends critically on glass composition, thickness, and surface treatment:
To mitigate brittleness concerns, several strategies are employed:
TGV fabrication represents the most critical and challenging process step in glass core substrate board manufacturing 1,2,7. Multiple approaches exist, each with distinct advantages and limitations:
Laser Drilling
Mechanical Drilling
Photosensitive Glass Etching
After TGV formation, metallization establishes electrical connectivity through the glass core 1,2,8,12:
Electroless Plating Seed Layer
Electrolytic Copper Plating
Via Filling Optimization To prevent void formation during electrolytic plating of high-aspect-ratio TGVs, via geometry must satisfy empirical relationships 7:
Expression (1): 0.020 < (D-d)ν/(2h)
Expression (2): 3.7 > h/(D*ν)
Where D = via diameter at entry surface (μm), d = via diameter at exit surface (μm), h = glass thickness (μm), ν = plating solution viscosity (cP). Tapered via profiles (D > d) facilitate air bubble escape and ensure complete filling 7.
Following core metallization, dielectric build-up layers and fine-pitch circuitry are formed using sequential lamination and patterning 1,2,4:
For applications requiring thicker substrates or complex internal structures, multiple glass layers are bonded together 10,15,19:
Adhesive Bonding
Anodic Bonding
Optical Contact Bonding
Glass core substrate board technology addresses critical bottlenecks in next-generation processors and accelerators 1,2,4:
Multi-Die Integration Platforms
High-Speed Serial Links
Thermal Management
The superior thermal stability and mechanical reliability of glass core substrate board make it ideal for automotive and industrial applications 3,8,17:
Powertrain And Safety Systems
| Org | Application Scenarios | Product/Project | Technical Outcomes |
|---|---|---|---|
| Intel Corporation | High-performance computing platforms requiring 2.5D/3D heterogeneous integration of logic dies, HBM memory stacks, and I/O chiplets with ultra-short interconnects and reliable solder joints for advanced processors and accelerators. | Glass Core Substrate Technology | Enables ultra-high-density interconnects with build-up structures on glass cores, supporting multi-die integration with CTE matching silicon (3.0-5.5 ppm/°C vs 2.6-3.2 ppm/°C for Si), reducing package warpage to <50 μm across 60×60 mm² footprints for >10,000 I/O connections. |
| Toppan Inc. | High-density semiconductor packaging requiring void-free via filling in glass substrates with aspect ratios up to 10:1, suitable for advanced IC devices demanding ultra-fine pitch interconnects and enhanced reliability. | Glass Core Multilayer Wiring Board | Optimized through-glass via geometry satisfying 0.020<(D-d)ν/(2h) and 3.7>h/(D*ν) prevents void formation during electrolytic plating, with electroless nickel plating containing <5 mass% phosphorus to minimize residual stress and cracking. |
| Samsung Electronics Co. Ltd. | Advanced semiconductor packages requiring high-density die-to-die connections (pitch 40-55 μm) for multi-chip modules in data center applications, AI accelerators, and high-performance computing systems. | Glass Core Substrate with Si Bridge Interposer | Minimizes silicon interposer size while maintaining chip-to-chip connectivity by embedding Si bridge in glass core cavity, reducing package warpage and enabling miniaturization with multi-layer wiring under glass core substrate. |
| Schott AG | High-speed telecommunications and data center interconnects requiring optical signal transmission combined with electrical routing, suitable for photonic integrated circuits and optical computing applications operating above 10 GHz. | Glass Circuit Board with Optical Functionalities | Integrates optical waveguides within glass substrate providing low thermal mismatch with semiconductor dies, enabling both electrical and optical signal transmission with superior thermal stability and dimensional precision. |
| LG Innotek Co. Ltd. | Compact semiconductor packages for automotive electronics and mobile devices requiring enhanced reliability under thermal cycling (-55°C to +175°C) and mechanical stress, with improved signal integrity for high-speed applications. | Glass Core Circuit Board with Insulating Substrate | Suppresses warpage and breakage through controlled spacing between glass core layer and separate insulating substrate with connection build-up layers, reducing electrical resistance and delay rates while enhancing mechanical strength and preventing crack propagation. |