MAR 27, 202666 MINS READ
Plasma processing of glass core substrates involves the controlled application of ionized gases to modify substrate surfaces, deposit thin films, or selectively remove materials with nanometer-scale precision 34. The process begins with the introduction of process gases—such as silane (SiH₄), nitrogen (N₂), oxygen (O₂), or fluorocarbon compounds (C₄F₈, CHF₃)—into a vacuum chamber where the glass substrate is positioned on a temperature-controlled support member 27. Radio frequency (RF) energy, typically in the range of 13.56 MHz to several hundred MHz, is applied through inductive coils or capacitive electrodes to generate an electromagnetic field that dissociates gas molecules into charged ions, free radicals, and electrons 56.
The plasma generation mechanisms employed for glass core substrates include:
The interaction between plasma species and the glass substrate surface depends critically on ion energy (controlled by bias voltage, typically 50–500 V), substrate temperature (maintained between 150–400°C for thermal stability), and chamber pressure (1–100 mTorr) 27. For glass core substrates used in integrated circuit devices, plasma processing enables the formation of through-glass vias (TGVs) with diameters of 10–100 μm and aspect ratios exceeding 10:1, filled with copper or tungsten conductors to provide vertical electrical interconnections 18.
Glass core substrates for plasma processing applications are typically fabricated from borosilicate glass, aluminosilicate glass, or fused silica, selected based on thermal expansion coefficient (CTE), dielectric constant, and chemical resistance requirements 1418. Borosilicate glass compositions (e.g., Corning Eagle XG® or Schott AF45) exhibit CTE values of 3.2–4.6 ppm/°C, closely matching silicon (2.6 ppm/°C) to minimize thermal stress during subsequent semiconductor processing steps 18. The glass substrates possess dielectric constants (εᵣ) ranging from 4.6 to 6.8 at 1 MHz, loss tangents (tan δ) below 0.006, and breakdown voltages exceeding 10 MV/cm, making them suitable for high-frequency signal transmission in advanced packaging applications 18.
Key structural parameters for plasma processed glass core substrates include:
The glass core may comprise a single monolithic piece or multiple glass sections joined through fusion bonding or adhesive lamination 18. For multi-section cores, alignment precision better than ±5 μm is required to ensure electrical continuity of conductors extending through the glass thickness 18. Surface preparation prior to plasma processing typically involves cleaning with piranha solution (H₂SO₄:H₂O₂ = 3:1) followed by oxygen plasma treatment (300 W, 5 minutes) to remove organic contaminants and activate surface hydroxyl groups, enhancing adhesion of subsequently deposited films 115.
Plasma-Enhanced Chemical Vapor Deposition (PECVD) represents the primary method for depositing functional thin films onto glass core substrates, enabling formation of dielectric layers, passivation coatings, and barrier films at temperatures compatible with glass substrates (150–400°C) 27. The PECVD process involves introducing precursor gases—such as silane (SiH₄) and ammonia (NH₃) for silicon nitride (Si₃N₄), or tetraethyl orthosilicate (TEOS) and oxygen for silicon dioxide (SiO₂)—into the plasma region where dissociation and ionization occur 56. The resulting reactive species diffuse to the substrate surface where they undergo surface reactions, nucleation, and film growth.
Critical PECVD process parameters for glass core substrates include:
For glass core substrates in integrated circuit applications, PECVD enables deposition of build-up dielectric layers with thicknesses of 2–20 μm, dielectric constants of 3.5–4.2, and breakdown strengths exceeding 5 MV/cm 18. Multi-layer stacks comprising alternating silicon dioxide and silicon nitride layers provide moisture barriers with water vapor transmission rates below 10⁻⁶ g/m²/day, essential for protecting embedded conductors from corrosion 78. The edge and backside of glass substrates are protected during deposition using shadow frames—precision-machined metal fixtures that cover several millimeters of the substrate periphery, preventing unwanted film deposition that could cause handling difficulties or electrical shorts 7812.
Plasma etching of glass core substrates enables the formation of through-glass vias (TGVs) that provide vertical electrical interconnections between build-up layers on opposing substrate surfaces 11118. The etching process employs fluorine-based chemistries—primarily SF₆, CF₄, or CHF₃—that react with silicon and oxygen atoms in the glass matrix to form volatile SiF₄ and CO₂ products 1516. The etch selectivity between glass and photoresist masks typically ranges from 3:1 to 8:1, requiring resist thicknesses of 5–15 μm to pattern vias with depths exceeding 100 μm 111.
Key plasma etching parameters for TGV formation include:
Following plasma etching, TGVs undergo sidewall smoothing through wet chemical treatment (dilute HF, 1–5 minutes) to remove redeposition and reduce surface roughness from 50–100 nm to below 10 nm 18. The vias are then metallized through electroless copper plating or physical vapor deposition (PVD) of barrier/seed layers (Ti/Cu, 50/200 nm) followed by electrolytic copper filling 18. Plasma processing plays a critical role in pre-metallization surface preparation, with argon plasma cleaning (200 W, 2 minutes) removing organic residues and native oxides to ensure adhesion strengths exceeding 10 MPa between deposited metals and glass sidewalls 115.
Achieving uniform plasma processing across large-area glass core substrates requires precise control of thermal gradients, as temperature variations directly affect reaction kinetics, film stress, and substrate deformation 27. Glass substrates are positioned on temperature-controlled support members (susceptors) incorporating embedded resistive heating elements or fluid cooling channels that maintain substrate temperatures within ±3°C across the entire surface 27. For a 730 mm × 920 mm Gen 8.5 glass substrate used in flat panel display manufacturing, the susceptor design must compensate for non-uniform plasma heating (typically 20–50 W deposited at the substrate center) while preventing edge cooling effects 2.
Thermal management strategies for plasma processed glass core substrates include:
Substrate bowing during plasma processing represents a significant challenge, as thermal expansion mismatch between deposited films and glass substrates can induce curvature exceeding 100 μm for 300 mm substrates 27. Compressive stress in PECVD silicon nitride films (typically 200–800 MPa) causes convex bowing, while tensile stress in silicon dioxide films (50–200 MPa) produces concave bowing 78. Stress compensation is achieved through multi-layer film stacks with alternating compressive and tensile layers, or by adjusting PECVD process parameters (RF power, pressure, gas ratios) to tune intrinsic film stress to near-zero values 27. For glass core substrates in integrated circuit applications, residual substrate bow must be maintained below ±50 μm to ensure compatibility with subsequent photolithography and die attach processes 18.
Plasma processed glass core substrates have emerged as a transformative technology for advanced semiconductor packaging, addressing critical limitations of organic substrates in high-frequency, high-power, and high-density interconnect applications 18. The superior electrical properties of glass—including low dielectric constant (4.6–6.8 vs. 3.5–4.5 for organic substrates), low loss tangent (<0.006 vs. 0.01–0.02), and high breakdown voltage (>10 MV/cm vs. 3–5 MV/cm)—enable signal transmission at frequencies exceeding 100 GHz with reduced insertion loss and crosstalk 18.
Glass core substrates fabricated through plasma processing enable the integration of high-bandwidth memory (HBM) stacks and logic dies in 2.5D and 3D packaging configurations 18. Through-glass vias with diameters of 20–50 μm and pitches of 40–100 μm provide vertical interconnections with electrical resistance below 50 mΩ per via and parasitic capacitance below 10 fF, supporting data transfer rates exceeding 1 Tb/s 18. The thermal conductivity of glass (1.0–1.4 W/mK) combined with embedded thermal vias filled with copper (400 W/mK) enables effective heat dissipation from high-power processors (>300 W TDP) 18.
Plasma-deposited dielectric build-up layers on glass cores support fine-line redistribution layers (RDL) with line widths and spacings of 2–5 μm, enabling fan-out wafer-level packaging (FOWLP) with I/O densities exceeding 10,000 connections per cm² 18. The dimensional stability of glass substrates (CTE 3.2–4.6 ppm/°C) minimizes warpage during high-temperature processing (260°C reflow), ensuring alignment accuracy better than ±5 μm for micro-bump interconnections with pitches below 40 μm 18. Case studies from leading semiconductor manufacturers demonstrate that glass core substrates enable 30–50% reduction in package thickness and 20–40% improvement in electrical performance compared to organic substrates for AI accelerator applications 18.
For 5G/6G wireless communication systems operating at frequencies of 28–300 GHz, plasma processed glass core substrates provide the low-loss dielectric platform essential for antenna-in-package (AiP) and RF front-end module (FEM) integration 18. The loss tangent of glass substrates (tan δ < 0.006 at 100 GHz) results in signal attenuation below 0.5 dB/cm for 50 Ω microstrip transmission lines, compared to 1.5–3.0 dB/cm for organic substrates 18. Plasma etching enables formation of high-precision cavity structures for embedding passive components (inductors, capacitors, filters) with Q-factors exceeding 50 at millimeter-wave frequencies 18.
The hermetic nature of glass combined with plasma-deposited silicon nitride passivation layers (200–500 nm thickness) provides moisture barriers with water vapor transmission rates below 10⁻⁶ g/m²/day, ensuring long-term reliability of RF components in harsh environmental conditions 7818. Plasma surface modification through oxygen or nitrogen plasma treatment (300–500 W, 5–10 minutes) enhances adhesion of subsequently deposited copper seed layers, achieving peel strengths exceeding 1.5 N/mm for RF transmission lines subjected to thermal cycling (-40°C to +125
| Org | Application Scenarios | Product/Project | Technical Outcomes |
|---|---|---|---|
| Applied Materials Inc. | Flat panel display manufacturing and glass substrate processing requiring edge protection and uniform dielectric layer deposition for OLED and transistor fabrication | PECVD System with Shadow Frame | Enables uniform thin film deposition on glass substrates at 250-350°C with thickness uniformity better than ±3%, while protecting substrate edges and backside from unwanted deposition using precision shadow frames |
| Lam Research Corporation | Semiconductor substrate processing and glass core substrate etching for high-density interconnect structures in advanced IC packaging applications | Inductively Coupled Plasma Etching System | Achieves plasma density of 10¹¹-10¹² ions/cm³ with etch rate uniformity better than ±5% across 300mm substrates, enabling formation of through-glass vias with aspect ratios exceeding 10:1 |
| Lam Research Corporation | Plasma etching and deposition processes requiring high uniformity across substrate surfaces for IC fabrication and display panel manufacturing | Antenna Design for Uniform Plasma Processing | Optimized RF antenna geometry produces uniform plasma density distribution across large-area substrates, supporting processing uniformity for both semiconductor wafers and flat panel display glass substrates |
| Samsung Electronics Co. Ltd. | Semiconductor substrate etching processes requiring enhanced pattern uniformity and precise plasma control for advanced device fabrication | Substrate Processing Apparatus with Internal Electrode | Utilizes internal electrode beneath substrate support to generate electromagnetic field for plasma generation, improving patterning uniformity in etching processes through controlled plasma distribution |
| Intel Corporation | Advanced semiconductor packaging for high-performance computing, AI processors, and RF/millimeter-wave applications requiring superior electrical performance and thermal management | Glass Core Substrate for IC Devices | Provides low dielectric constant (4.6-6.8), low loss tangent (<0.006), and thermal stability (CTE 3.2-4.6 ppm/°C) with through-glass vias enabling vertical electrical interconnections for high-density packaging |