MAR 26, 202672 MINS READ
Polycrystalline silicon carbide consists of silicon carbide grains with varying crystallographic polytypes, predominantly α-SiC (hexagonal) and β-SiC (cubic), bonded at grain boundaries through solid-state sintering or chemical vapor deposition processes 4. The material composition typically comprises ≥95% SiC by mass, with controlled additions of sintering aids such as aluminum oxide (0.25-3.5 wt%), boron compounds (0.1-0.8 wt%), or nitrogen-based additives to facilitate densification and tailor electrical properties 24. The crystallographic structure exhibits grain sizes ranging from submicron (<100 nm in spark plasma sintered materials) to several micrometers (1-10 μm in conventional hot-pressed ceramics), with grain boundary chemistry critically influencing both mechanical and electrical performance 34.
The phase composition balance between β-SiC and α-SiC polytypes significantly affects material properties. High-purity dense sintered poly-SiC materials demonstrate a mass ratio of β-SiC to α-SiC content less than 2:1, achieved through controlled sintering of predominantly β-SiC powders (>90% β-form) at temperatures between 1800-2200°C 4. During high-temperature processing, partial β-to-α phase transformation occurs, resulting in finished materials containing 98.8% α-SiC with maximum grain sizes of 12 μm and achieving densities ≥99% of theoretical density 18. The microstructural homogeneity and grain size distribution directly correlate with mechanical strength retention at elevated temperatures, with finer grain structures (<5 μm) exhibiting superior creep resistance and transcrystalline fracture modes rather than intergranular failure 218.
Impurity control represents a critical factor in polycrystalline silicon carbide quality. High-purity formulations limit metallic impurities to <0.1 wt% and restrict elements from groups 3a and 5a (predominantly Al, B, N) to <0.03 wt% total, with free carbon content maintained below 0.3 wt% 2. Advanced manufacturing protocols incorporate carbon sources with >99% elemental carbon purity in amounts between 0.5-3 wt% to control stoichiometry and suppress unwanted silicate phase formation at grain boundaries 4. The presence of aluminum in solid solution (0.1-0.4 wt%) within the SiC lattice, rather than as discrete grain boundary phases, promotes transcrystalline fracture and suppresses subcritical crack propagation, resulting in n-exponent values indicative of superior slow crack growth resistance 18.
Conventional sintering approaches for polycrystalline silicon carbide substrates employ hot pressing or hot isostatic pressing (HIP) techniques to achieve near-theoretical density. Hot pressing processes utilize temperatures of 1700-2200°C under pressures of 100-400 MPa in inert gas atmospheres, with processing parameters optimized based on powder characteristics and desired final properties 213. For electrical insulation applications, formulations containing 0.25-3.5 wt% Al₂O₃ and/or MgO as sintering aids achieve specific electrical resistance ≥10^9 Ohm·cm, thermal conductivity ≥170 W/mK, and dielectric strength of 20 kV/mm when processed via isostatic hot pressing in hermetically sealed casings 2.
Advanced solid-phase sintering protocols for high-purity dense poly-SiC employ pressures exceeding 80 MPa at temperatures between 1800-2100°C, utilizing SiC powders with median particle sizes of 0.1-5 μm and >95% SiC purity where the β-crystallographic form represents >90% of the total SiC mass 4. The incorporation of boron as a sintering additive (0.2-0.7 wt% of total SiC mass) combined with 0.5-3 wt% uncrystallized carbon powder (median diameter <1 μm) facilitates densification while maintaining high purity, resulting in materials with total porosity <2% by volume and SiC mass content ≥99% excluding free carbon 4. These processing conditions produce polycrystalline bodies with median grain equivalent diameters between 1-10 μm and achieve densities ≥93% of theoretical SiC density for β-SiC dominant compositions 10.
Spark plasma sintering (SPS) represents an emerging rapid consolidation technique for polycrystalline silicon carbide substrates, enabling densification at lower temperatures and shorter processing times compared to conventional methods. SPS processing of SiC powder blends containing group IV-V compounds (Si₃N₄, Ge₃N₄, Sn₃N₄) and/or group III-IV compounds (B₄C, SiB₄) with average particle diameters ≤100 nm produces polycrystalline ingots with crystallite sizes ≤100 nm and relative densities ≥99% 3. The incorporation of germanium and/or tin along with nitrogen, phosphorus, or boron dopants enables tailoring of electrical conductivity for specific semiconductor applications, with the fine-grained microstructure suppressing dislocation glide and substrate warpage during subsequent thermal processing 36.
Chemical vapor deposition methods provide alternative routes for polycrystalline silicon carbide substrate production, offering advantages in thickness control, purity, and substrate reusability. CVD-based manufacturing involves forming polycrystalline SiC films on underlying substrates (graphite or SiC seeds) followed by separation and optional post-processing 79. A representative process sequence includes: (1) forming a carbon layer (typically graphite) on a first underlying substrate, (2) depositing a polycrystalline SiC film via CVD on the carbon-coated surface, (3) removing the outer peripheral edge of the deposited film to expose the carbon interlayer, and (4) burning the exposed carbon layer in an oxygen-containing atmosphere to separate the polycrystalline SiC film from the underlying substrate 7. This approach enables reuse of the base substrate without destruction, significantly reducing manufacturing costs while maintaining substrate quality 79.
Hybrid manufacturing strategies combine sintering and CVD processes to optimize substrate properties and economics. A two-stage method involves first forming a polycrystalline SiC base substrate via sintering of powdered semiconductor materials, followed by CVD deposition of additional SiC layers on the sintered substrate surface 8. Since both the sintered base and CVD-deposited layer consist of SiC, their coefficients of thermal expansion (CTE) match closely, minimizing thermal stress and warpage during processing and device operation 8. Post-sintering CVD impregnation processes can create density gradients within substrates, with lower density at one surface and higher density at the opposite surface, achieved by applying differential temperatures to substrate faces during CVD or by controlled Si and C atom infiltration 15.
Advanced substrate fabrication protocols incorporate multiple processing stages to eliminate defects and optimize properties. A representative sequence for high-quality polycrystalline SiC substrates includes: (1) heat treatment of SiC powders under nitrogen atmosphere to remove surface contaminants and control stoichiometry, (2) sintering under nitrogen atmosphere to achieve initial densification, and (3) CVD film deposition on the sintered body surface to seal residual porosity and create a dense, defect-free surface layer 16. This multi-stage approach eliminates air gaps that would interfere with subsequent bonding of monocrystalline SiC device layers while achieving low electrical resistance and improved mechanical durability 16.
The electrical properties of polycrystalline silicon carbide span an exceptionally wide range depending on composition, doping, and microstructure, enabling applications from electrical insulators to conductive substrates for power electronics. High-resistivity polycrystalline SiC substrates achieve specific electrical resistance ≥10^5 Ohm·cm, with optimized formulations reaching ≥10^9 Ohm·cm for electrical insulation applications 12. These high-resistivity materials benefit high-power electronic systems by minimizing leakage currents and parasitic losses, with the polycrystalline microstructure providing inherent advantages over single-crystal substrates including suppression of glide dislocation and reduced substrate warpage (<75 μm) during thermal processing 112.
Conversely, electrically conductive polycrystalline SiC materials achieve resistivity values ≤2 mOhm·cm through controlled doping and microstructural engineering 12. Low-resistivity poly-SiC substrates incorporate nitrogen, phosphorus, or boron dopants and exhibit non-columnar grain structures with grain sizes ≤1 mm, providing electrical conductivity suitable for substrate applications in power semiconductor devices while maintaining mechanical robustness 12. The addition of 3.5-10 wt% silicon nitride combined with boron-containing additives produces dense, substantially nonporous ceramics with improved electrical conducting properties, enabling machining by electrical discharge machining (EDM) or electrochemical machining (ECM) techniques not applicable to insulating ceramics 5.
The grain boundary chemistry critically influences electrical transport properties in polycrystalline silicon carbide. Materials processed with aluminum oxide and/or magnesium oxide sintering aids exhibit these oxide phases predominantly segregated at SiC grain boundaries, where they are detectable as separate phases via microstructural analysis 2. This grain boundary oxide distribution contributes to high electrical resistivity by creating insulating barriers between conductive SiC grains. In contrast, materials with aluminum in solid solution within the SiC lattice rather than at grain boundaries demonstrate different electrical characteristics and superior high-temperature mechanical properties due to altered grain boundary cohesion 18.
Polycrystalline silicon carbide exhibits exceptional thermal conductivity, with high-purity dense materials achieving values ≥170 W/mK at room temperature, approaching the thermal conductivity of single-crystal SiC 2. This outstanding thermal transport capability derives from the strong covalent Si-C bonding and low phonon scattering in high-purity, dense microstructures with minimal grain boundary impedance. The thermal conductivity shows relatively weak temperature dependence compared to metals, with poly-SiC maintaining effective heat dissipation capabilities across wide temperature ranges from cryogenic conditions to >1400°C 18.
The thermal expansion behavior of polycrystalline silicon carbide demonstrates excellent dimensional stability, with thermal expansion coefficients ≤3.5×10^-6 K^-1 over broad temperature ranges 2. This low thermal expansion, combined with high thermal conductivity, provides superior thermal shock resistance compared to most ceramic materials, enabling rapid heating and cooling cycles without mechanical failure. The thermal expansion coefficient remains relatively constant across different crystallographic polytypes and grain orientations in polycrystalline materials, facilitating CTE matching when bonding poly-SiC substrates with monocrystalline SiC device layers or integrating poly-SiC components into multi-material assemblies 8.
Thermal stability represents a critical performance parameter for high-temperature applications. Polycrystalline silicon carbide maintains structural integrity and mechanical properties to temperatures exceeding 1450°C in inert or reducing atmospheres, with oxidation resistance in air to approximately 1400°C due to formation of protective silica surface layers 18. Thermogravimetric analysis (TGA) of high-purity poly-SiC shows negligible mass change (<0.1%) when heated to 1500°C in argon, confirming exceptional thermal stability 4. The incorporation of boron into polycrystalline SiC fibers enhances thermal stability during ceramification processes, enabling production of thermally stable, substantially polycrystalline SiC ceramic fibers from polycarbosilane resin precursors 14.
Polycrystalline silicon carbide exhibits outstanding mechanical properties including high hardness (typically 25-28 GPa), flexural strength, and fracture toughness, with performance characteristics strongly dependent on microstructural parameters. Dense poly-SiC materials with grain sizes of 1-10 μm and porosity <2% achieve flexural strengths ≥600 N/mm² at room temperature, with strength retention to elevated temperatures depending on grain boundary chemistry and phase composition 418. Materials with aluminum in solid solution and predominantly transcrystalline fracture modes maintain bending strength ≥600 N/mm² up to 1450°C, representing superior high-temperature mechanical performance compared to conventional hot-pressed SiC with intergranular fracture characteristics 18.
The fracture behavior of polycrystalline silicon carbide transitions from intergranular to transcrystalline modes depending on grain boundary chemistry and processing conditions. Materials with oxide phases (Al₂O₃, MgO) segregated at grain boundaries typically exhibit intergranular fracture, with crack propagation along grain boundaries representing the path of least resistance 2. In contrast, poly-SiC with aluminum and other additives in solid solution within SiC grains demonstrates predominantly transcrystalline fracture, where cracks propagate through grain interiors rather than along boundaries 18. This transcrystalline fracture mode correlates with superior mechanical properties including higher fracture toughness, improved creep resistance, and suppression of subcritical crack growth, as quantified by high n-exponent values in slow crack growth testing 18.
Creep resistance and dimensional stability under sustained high-temperature loading represent critical performance parameters for structural applications. Polycrystalline silicon carbide with fine grain structures (<5 μm) and optimized grain boundary chemistry exhibits minimal creep deformation at temperatures up to 1400°C under typical service stresses 18. The numerous grain boundaries in poly-SiC microstructures block dislocation glide, suppressing the primary deformation mechanism that limits high-temperature performance of single-crystal SiC 36. This grain boundary strengthening effect becomes particularly important during thermal processing of semiconductor devices, where poly-SiC substrates maintain dimensional stability while single-crystal substrates may experience warpage due to dislocation motion 6.
Polycrystalline silicon carbide substrates have emerged as cost-effective alternatives to single-crystal SiC substrates for power semiconductor device manufacturing, addressing the primary economic barrier to widespread SiC power electronics adoption 6. Single-crystal SiC substrate costs represent a major component of overall device manufacturing expenses, with only a few micrometers of the substrate surface layer utilized as the active device region (drift layer, channel, etc.) 6. Poly-SiC substrates enable a hybrid approach where a thin monocrystalline SiC device layer (typically <100 μm) is bonded to a thicker polycrystalline SiC support substrate, reducing material costs while maintaining device performance 12.
The implementation of poly-SiC support substrates in power semiconductor manufacturing involves several technical considerations. The polycrystalline substrate must provide adequate electrical conductivity (resistivity ≤2 mOhm·cm) to minimize series resistance and power losses in vertical device structures, while maintaining mechanical robustness and thermal conductivity for heat dissipation 12. Low-resistivity poly-SiC substrates with non-columnar grain structures and grain sizes ≤1 mm achieve these requirements, with warpage controlled to <75 μm across 150-200 mm diameter wafers to ensure compatibility with semiconductor processing equipment 12. The monocrystalline SiC device layer is coupled to the polycrystalline support substrate through a bonding region, creating a composite structure that combines the electronic properties of single-crystal SiC with the economic and mechanical advantages of poly-SiC 12.
Power semiconductor devices fabricated on poly-SiC substrates include SiC Schottky barrier diodes, SiC MOSFETs, SiC bipolar transistors, SiC thyristors, and SiC insulated gate bipolar transistors (
| Org | Application Scenarios | Product/Project | Technical Outcomes |
|---|---|---|---|
| STMicroelectronics International N.V. | High-power semiconductor devices and systems requiring electrical insulation, minimal leakage current, and dimensional stability during thermal processing. | High Resistivity Polycrystalline SiC Substrate | Achieves resistivity ≥1×10^5 Ohm·cm with low warpage (<75 μm), eliminating crystal defects and optimizing high-power electronic device performance. |
| STMicroelectronics International N.V. | Cost-effective support substrates for SiC power semiconductor devices including MOSFETs, Schottky diodes, and IGBTs, reducing single-crystal substrate costs. | Low Resistivity Polycrystalline SiC Substrate | Achieves resistivity ≤2 mOhm·cm with non-columnar grain structure (grain size ≤1 mm), providing electrical conductivity while suppressing substrate warpage and dislocation glide. |
| ELEKTROSCHMELZWERK KEMPTEN GMBH | Electrical insulation applications in high-power electronics requiring superior thermal management, high dielectric strength, and dimensional stability. | Electrically Insulating Polycrystalline SiC Substrate | Thermal conductivity ≥170 W/mK, specific electrical resistance ≥10^9 Ohm·cm, dielectric strength 20 kV/mm, achieved through isostatic hot pressing with Al₂O₃/MgO sintering aids. |
| ROHM CO. LTD. | Power semiconductor devices including SiC Schottky barrier diodes, MOSFETs, bipolar transistors, and IGBTs requiring cost-effective substrates with thermal stability. | Polycrystalline SiC Semiconductor Substrate | Crystallite size ≤100 nm with relative density ≥99%, incorporating Ge/Sn and N/P/B dopants via spark plasma sintering, suppressing dislocation glide and substrate deformation. |
| SAINT-GOBAIN CENTRE DE RECHERCHES ET D'ETUDES EUROPEEN | High-temperature structural components, semiconductor substrates, and applications requiring exceptional purity, thermal conductivity, and mechanical strength up to 1450°C. | High-Purity Dense Sintered SiC Material | SiC content ≥99% with total porosity <2%, median grain size 1-10 μm, achieving density ≥93% of theoretical through boron-aided solid-phase sintering at 1800-2100°C. |