Through Glass Via Polymer Filled Substrate: Advanced Interposer Technology For High-Density Optical And Electronic Interconnects

Fundamental Architecture And Material Composition Of Through Glass Via Polymer Filled Substrates

Through glass via polymer filled substrates integrate multiple functional layers to achieve reliable vertical interconnection. The core structure typically consists of a glass substrate with precisely formed vias that extend completely through the thickness, ranging from 50 μm to 500 μm depending on application requirements 1. These vias are filled with polymeric materials selected for specific optical or electrical properties. In optical interposers, a first optical polymer with lower refractive index (typically n = 1.45–1.50) bonds to the glass substrate and lines the interior surfaces of vias, while a second optical polymer with higher refractive index (n = 1.55–1.65) forms the via core to enable total internal reflection and efficient light transmission 1. For electrical applications, the polymer serves as an insulating base material that facilitates subsequent metallization, with conductive materials such as copper, gold, titanium, or tungsten plated onto the polymer-lined via walls to create electrical pathways 7.

The glass substrate material selection critically influences overall performance. Soda-lime glass exhibits a linear thermal expansion coefficient of approximately 8–9 ppm/°C, while alkali-free glass demonstrates lower expansion at 3–5 ppm/°C, making it preferable for applications requiring thermal stability up to 300–350°C during device fabrication 8. Borosilicate glass offers additional advantages including enhanced thermal shock resistance and reduced solar absorptance when incorporated as particulate reinforcement in polymer matrices 13. The substrate thickness typically ranges from 100 μm to 700 μm, with thinner substrates (≤200 μm) increasingly adopted for flexible and lightweight applications 17,19.

Polymer selection depends on functional requirements. For optical vias, materials must exhibit high transparency (>90% transmission at target wavelengths), low optical loss (<0.5 dB/cm), thermal stability during subsequent processing, and refractive index matching to minimize interface reflections 1. Common optical polymers include modified acrylates, epoxies, and silicone-based formulations. For electrical vias, the polymer base material must demonstrate excellent adhesion to glass, compatibility with electroplating chemistries, and dimensional stability. Polyimide resins are frequently employed due to their thermal resistance (continuous use temperature >300°C), low coefficient of thermal expansion (CTE = 3–5 ppm/°C matching glass), and chemical resistance 8. Alternative polymers include polyamide-imides, thermosetting vinylester resins, and specialized photopolymerizable compositions 10.

The interface between glass and polymer represents a critical design consideration. Surface treatments such as oxygen plasma exposure create hydroxyl groups, keto groups, and carboxylate groups on glass surfaces, enhancing covalent bonding with amino-functional polymers through condensation reactions 18. Silane coupling agents provide an alternative approach, forming Si-O-Si bonds with glass while presenting organic functional groups for polymer attachment 8. These interfacial engineering strategies ensure mechanical integrity during thermal cycling and prevent delamination under operational stress.

Via Formation Methodologies And Process Optimization For Through Glass Via Polymer Filled Substrates

The manufacturing sequence for through glass via polymer filled substrates begins with via formation in the glass substrate, followed by surface treatment, polymer filling, and optional metallization. Multiple via formation techniques have been developed, each offering distinct advantages for specific geometries and production volumes.

Laser ablation represents the most widely adopted method for creating optical vias in glass substrates 1. Ultrafast laser systems (picosecond or femtosecond pulse duration) generate localized material removal through nonlinear absorption and plasma formation, enabling precise control of via diameter (typically 20–100 μm) and taper angle (0–5°). The laser parameters including wavelength (commonly 355 nm or 1064 nm), pulse energy (10–100 μJ), repetition rate (10–500 kHz), and scanning speed (10–1000 mm/s) must be optimized to minimize thermal damage zones and surface microcracks 1. Post-ablation chemical etching in hydrofluoric acid (HF) solutions (5–20% concentration, 5–30 minutes exposure) improves via sidewall smoothness, reducing surface roughness from Ra = 500–1000 nm (as-ablated) to Ra = 50–200 nm (etched), which is critical for minimizing optical scattering losses 1.

For electrical vias requiring larger diameters (100–300 μm) and higher aspect ratios (depth:diameter up to 5:1), a two-step drilling and etching process offers advantages 7,12. Initial pilot holes are created by mechanical drilling, laser damage tracks, or swift heavy ion bombardment, followed by wet chemical etching in HF or buffered oxide etch (BOE) solutions to enlarge the holes to final dimensions 12. This approach achieves smooth, circular vias with controlled taper and reduced cracking around hole perimeters compared to direct large-diameter drilling 12. The etching rate depends on glass composition, etchant concentration, temperature (typically 20–60°C), and agitation, with typical rates of 1–10 μm/min for borosilicate and alkali-free glasses 12.

Polymer filling techniques vary based on via geometry and polymer viscosity. For optical vias with small diameters (<50 μm), vacuum-assisted capillary filling ensures complete via penetration without void formation 1. The glass substrate is placed in a vacuum chamber (pressure <10 mbar), liquid polymer is dispensed onto the via openings, and atmospheric pressure is restored to drive polymer into the vias. Polymer viscosity (typically 50–500 cP at filling temperature) and surface tension (25–40 mN/m) must be optimized to achieve complete filling within practical timeframes (1–10 minutes) 1. For larger electrical vias, screen printing or stencil printing deposits polymer paste (viscosity 5,000–50,000 cP) over via arrays, followed by squeegee action to force material into holes 7. Subsequent thermal curing (150–250°C for 30–120 minutes depending on polymer chemistry) solidifies the filled vias and establishes adhesion to glass sidewalls 7.

A critical innovation involves selective polymer filling to prevent overburden on substrate surfaces 15. In this approach, a blocking layer (typically photoresist or temporary polymer film) is applied to the upper and lower glass surfaces before via filling, leaving only the via openings exposed 15. Polymer or conductive paste is then deposited selectively into vias, and the blocking layer is subsequently removed, significantly reducing the burden of post-fill planarization processes 15. This technique is particularly valuable for copper-filled electrical vias, where excessive overburden removal by chemical-mechanical polishing (CMP) increases manufacturing cost and cycle time 15.

For optical interposers, a dual-polymer filling sequence achieves the required refractive index profile 1. First, the lower-index cladding polymer is applied to coat via sidewalls and bond to the glass substrate, typically by dip-coating or spray-coating followed by partial curing. Second, the higher-index core polymer is dispensed into the cladding-lined vias using precision dispensing systems (pneumatic or piezoelectric) with positional accuracy ±5 μm 1. Final UV or thermal curing (wavelength 365 nm, dose 1–5 J/cm² for UV-curable systems; temperature 150–200°C for 30–60 minutes for thermally cured systems) completes polymerization and establishes the optical waveguide structure 1.

Process optimization requires careful control of multiple parameters. Via taper angle affects filling completeness, with slight positive taper (via diameter increasing from bottom to top surface by 2–5°) facilitating polymer flow and air evacuation 1. Surface roughness of via sidewalls directly impacts optical loss, with Ra <100 nm required for low-loss optical transmission (<0.3 dB/cm) 1. For electrical vias, the polymer base layer thickness (typically 1–5 μm) must be sufficient to provide electrical insulation while maintaining adequate via conductivity after metallization 7. Thermal cycling tests (−40°C to +125°C, 500–1000 cycles) verify interface adhesion and absence of delamination or cracking 7.

Metallization And Conductive Via Formation In Through Glass Via Polymer Filled Substrates

For electrical interconnection applications, the polymer-filled vias must be metallized to provide vertical conductivity through the glass substrate. The polymer base material serves dual functions: it improves adhesion between glass and metal, and it provides a conductive seed layer deposition surface with superior plating characteristics compared to bare glass 7.

The metallization process typically begins with seed layer deposition on the polymer-lined via sidewalls and substrate surfaces 7. Physical vapor deposition (PVD) techniques including sputtering or evaporation deposit thin metal films (20–200 nm thickness) of titanium, chromium, or copper 7. Titanium and chromium serve as adhesion promoters due to their strong bonding to both polymer and glass surfaces, while copper provides the conductive base for subsequent electroplating 7. Alternative approaches employ electroless plating to deposit nickel or copper seed layers (0.1–1 μm thickness) through autocatalytic chemical reduction, offering advantages for high-aspect-ratio vias where line-of-sight PVD methods may produce non-uniform coverage 7.

Electroplating builds up the conductive via fill to final thickness 7,15. Copper electroplating from acidic sulfate baths (CuSO₄ concentration 50–250 g/L, H₂SO₄ concentration 10–100 g/L, temperature 20–30°C) represents the most common approach due to copper's high electrical conductivity (5.96 × 10⁷ S/m), excellent electromigration resistance, and mature plating chemistry 7,15. Plating current density (1–20 mA/cm²) and bath additives (suppressors, accelerators, levelers) control deposit morphology and filling characteristics 15. Bottom-up filling mechanisms, promoted by appropriate additive packages, ensure void-free via filling even for high aspect ratios (>3:1) 15. Plating time ranges from 30 minutes to several hours depending on via dimensions and required copper thickness (typically 10–50 μm) 15.

Alternative conductive materials include gold (for corrosion resistance and wire bonding applications), nickel (for magnetic applications and diffusion barriers), and tungsten (for high-temperature stability) 7. Each material requires specific plating chemistry and process conditions. Gold electroplating typically employs cyanide-based or sulfite-based baths at pH 4–7 and temperature 50–60°C 7. Nickel plating uses Watts-type baths (NiSO₄, NiCl₂, H₃BO₃) at pH 3–4 and temperature 50–60°C 7. Tungsten deposition may require chemical vapor deposition (CVD) rather than electroplating due to the metal's high melting point and limited aqueous plating chemistry 7.

The selective filling method significantly improves process efficiency by minimizing copper overburden on substrate surfaces 15. After seed layer deposition, a blocking layer (photoresist or dry film) is laminated onto the upper and lower glass surfaces, patterned to expose only via openings, and electroplating selectively fills the vias without depositing thick copper layers on field areas 15. This approach reduces subsequent CMP requirements from removing 10–30 μm of overburden to removing only 1–5 μm, decreasing process time by 60–80% and reducing consumable costs 15. The blocking layer is stripped after plating using appropriate solvents (for photoresist) or mechanical peeling (for dry films) 15.

Post-plating processes include annealing to reduce residual stress and improve grain structure (typically 150–250°C for 30–120 minutes in forming gas atmosphere), and surface planarization by CMP to achieve coplanar via tops and substrate surfaces (removal rate 100–500 nm/min, final surface roughness Ra <5 nm) 15. Electrical testing verifies via resistance (typically <10 mΩ for 100 μm diameter, 200 μm deep copper-filled vias) and isolation between adjacent vias (>10¹² Ω for 50 μm via pitch) 7.

Integration With Optical Waveguides And Photonic Devices In Through Glass Via Polymer Filled Substrates

Optical interposers based on through glass via polymer filled substrates enable three-dimensional photonic integration by providing vertical optical pathways that connect planar waveguide layers 1. This architecture supports high-density optical interconnects for applications including silicon photonics packaging, optical transceivers, and chip-to-chip optical communication systems.

Encapsulated optical waveguides are fabricated in direct communication with the polymer-filled optical vias 1. These waveguides typically consist of a core polymer layer (refractive index n = 1.55–1.65, thickness 5–50 μm) sandwiched between upper and lower cladding layers (n = 1.45–1.50, thickness 10–30 μm each) 1. Waveguide patterning employs photolithography of photosensitive polymers or reactive ion etching (RIE) of non-photosensitive polymers through patterned masks 1. Channel waveguide widths range from 3 μm to 50 μm depending on single-mode or multimode operation requirements, with typical propagation losses of 0.1–0.5 dB/cm at telecommunications wavelengths (1310 nm, 1550 nm) 1.

The optical coupling interface between planar waveguides and vertical vias requires careful design to minimize insertion loss and back-reflection 1. Mode field diameter matching ensures efficient power transfer, typically achieved by tapering the waveguide width from standard dimensions (e.g., 8 μm for single-mode at 1550 nm) to the via diameter (20–50 μm) over a transition length of 50–200 μm 1. The refractive index profile at the waveguide-via junction must provide continuous optical confinement, which is accomplished by ensuring the via core polymer has equal or higher refractive index than the waveguide core, while both are surrounded by lower-index cladding materials 1. Simulations using finite-difference time-domain (FDTD) or beam propagation methods (BPM) optimize junction geometry to achieve coupling efficiency >90% (insertion loss <0.5 dB) 1.

Upper optical isolation layers prevent optical crosstalk between adjacent vias and waveguides 1. These layers consist of opaque or highly absorbing materials (e.g., black polymer resins, metal films, or carbon-loaded polymers) deposited between optical channels with thickness 5–20 μm 1. Isolation effectiveness is quantified by crosstalk measurements, with typical specifications requiring <−40 dB isolation between channels spaced 50–100 μm apart 1.

Multi-layer optical interposers integrate multiple waveguide planes connected by polymer-filled vias, enabling complex three-dimensional optical routing 1. Fabrication sequences involve iterative deposition of cladding layers, core patterning, via formation and filling, and additional cladding deposition, with each layer requiring precise alignment (±2 μm) to maintain optical path continuity 1. Total interposer thickness ranges from 200 μm to 1000 μm depending on the number of waveguide layers (typically 2–6 layers) and via depth requirements 1.

Hybrid Glass-Polymer Substrates For Flexible Electronics And Display Applications

The combination of glass and polymer in substrate structures addresses the competing requirements of flexibility, thermal stability, and barrier properties for advanced electronic devices 8,10,11,17,19. These hybrid architectures enable processing of flexible displays, organic light-emitting diodes (OLEDs), and thin-film transistors using conventional glass-substrate manufacturing equipment while achieving final product flexibility.

Laminated glass-polymer structures consist of ultra-thin glass layers (thickness 10–100 μm) bonded to flexible polymer substrates (thickness 25–