Solar cell structure having multiple semiconductor layers, and manufacturing method therefor

AE202603191APendingJOLYWOOD (TAIZHOU) SOLAR TECHNOLOGY CO LTD
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Patent Information

Application Number
AE202603191
Authority / Receiving Office
AE · AE
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-03-29
Filing Date
2024-09-06

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Abstract

A solar cell structure having multiple semiconductor layers, and a manufacturing method therefor. The solar cell structure having multiple semiconductor layers comprises a silicon wafer; and a first semiconductor layer, a secondary semiconductor layer, and a metal electrode which are formed on the silicon wafer. The secondary semiconductor layer is locally or integrally formed above the first semiconductor layer, and the metal electrode is in contact with the secondary semiconductor layer. The material of the first semiconductor layer comprises polysilicon doped with phosphorus (P) or boron (B). The material of the secondary semiconductor layer comprises one layer or a combination of layers of TiO2, WO3, MoO3, TeO2, and / or NiO. The solar cell structure having multiple semiconductor layers can better control the thickness of the polysilicon, and the metal electrode is in contact with the secondary semiconductor layer, so that a low-cost electrode can be used for reducing costs, and the manufacturing process is simpler.
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Description

SOLAR CELL STRUCTURE WITH MULTI-LAYER SEMICONDUCTOR LAYER AND MANUFACTURING PROCESS THEREOF TECHNICAL FIELDThe present invention relates to the technical field of photovoltaic cells and specifically discloses a solar cell structure with a multi-layer semiconductor layer and a manufacturing process thereof. BACKGROUND TECHNOLOGY OF THE PRESENT INVENTIONThe use of doped polysilicon to form a junction is the key technology for a TOPCon structure. Due to its excellent passivation characteristics and charge collection capabilities, it plays a crucial role in the high efficiency of TOPCon cells. However, doped polysilicon causes current loss, due to free-carrier absorption (FCA) resulting from high doping concentrations and parasitic light absorption inherent to the polysilicon itself.To address this issue, when the thickness of the polysilicon is reduced, the use of conventional sintering processes during the sintering of metal paste may lead to metal punch-through, or cause shunting due to the diffusion of silver ions through the grain boundaries of the polysilicon, thereby degrading the characteristics of the cell sheet. In particular, if low-cost aluminium paste is used instead of silver paste, even with thick polysilicon deposited, the reaction between aluminium and polysilicon creates P-type doping, which significantly degrade the passivation characteristics of the N-type polysilicon.Patent CN202310955877.5 disclosed a back surface recombination passivation layer of a solar cell, a TOPCon cell and a manufacturing process thereof, where the metal electrode makes direct contact with the n+ doped polysilicon layer, making it difficult to employ Al electrodes.Patent US20220077328A1 disclosed a conductive paste and a method for manufacturing TOPCon solar cells. Although it employs Al conductive paste sintered to form the electrode, the conductive paste contains 25 to 40 wt% silicon to prevent the aluminium in the conductive paste from reacting with the N-type polysilicon. It increases the line resistance of the Al electrode, such that more conductive lines are needed to collect and conduct current; furthermore, the direct contact between the Al electrode and the doped polysilicon requires thick polysilicon, thereby increasing parasitic light absorption.To address the shortcomings of the aforementioned existing technologies, there is an urgent need for a new solar cell structure with a multi-layer semiconductor layer. SUMMARY OF THE PRESENT INVENTIONThe objective of the present invention is to overcome the deficiencies of the prior art by providing a solar cell structure with a multi-layer semiconductor layer and a manufacturing process thereof. In one aspect, the present invention discloses a solar cell structure with a multi-layer semiconductor layer, employing the following technical scheme:A solar cell structure with a multi-layer semiconductor layer, comprising: a silicon wafer; a first semiconductor layer, a secondary semiconductor layer and a metal electrode formed on the silicon wafer, wherein the secondary semiconductor layer is formed locally or entirely over the first semiconductor layer, and the metal electrode is in contact with the secondary semiconductor layer; the material of the first semiconductor layer comprises polysilicon doped with phosphorus (P) or boron (B); and the material of the secondary semiconductor layer comprises a single layer or a combination of multiple layers of TiO2, WO3, MoO3, TeO2 or NiO.Preferably, the secondary semiconductor layer comprises a second semiconductor layer formed on the first semiconductor layer, and the metal electrode is in contact with the second semiconductor layer.Preferably, a metal alloy is formed at the interface between the metal electrode and the second semiconductor layer, and the metal alloy is formed from reaction between the metal electrode and the metal element of the material of the second semiconductor layer.Preferably, the secondary semiconductor layer comprises a second semiconductor layer and a third semiconductor layer formed sequentially on the first semiconductor layer, and the metal electrode is in contact with the third semiconductor layer.Preferably, a metal alloy is formed at the interface between the metal electrode and the third semiconductor layer, and the metal alloy is formed from reaction between the metal electrode and the metal element of the material of the third semiconductor layer.Preferably, the metal electrode contains Al, Ag, Cu or a mixture thereof.Preferably, the thickness of the first semiconductor layer is 20 to 100 nm, and the thickness of the secondary semiconductor layer is 10 to 100 nm.Preferably, further comprises an encapsulation layer formed on the secondary semiconductor layer, wherein the encapsulation layer is a single layer or a combination of multiple layers of SiNx, SiOx, SiONx or Al2O3, and the thickness of the encapsulation layer is 10 to 80 nm.Preferably, the secondary semiconductor layer contains a dopant, the content of the dopant is 0 to 5 wt%, and the dopant comprises one or more of aluminium (Al), boron (B), vanadium (V), niobium (Nb), nitrogen (N), and oxygen (O).In another aspect, the present invention discloses a manufacturing process for a solar cell structure with a multi-layer semiconductor layer, employing the following technical scheme:A manufacturing process for a solar cell structure with a multi-layer semiconductor layer, comprising the following steps:S1: forming a first semiconductor layer on a silicon wafer via deposition and doping;S2: forming a secondary semiconductor layer on the first semiconductor layer via deposition; andS3: forming a metal electrode on the secondary semiconductor layer by printing a paste and sintering, so that the metal electrode is in contact with the secondary semiconductor layer.Preferably, in the step S2, TiO2, WO3, MoO3, TeO2 or NiO is directly deposited to form as a secondary semiconductor layer on the first semiconductor layer via PVD, PECVD, LPCVD or ALD.Preferably, in the step S2, a metal layer of Ti, W, Mo, Te or Ni is deposited to form on the first semiconductor layer via PVD, PECVD, LPCVD or ALD, and subsequently, TiO2, WO3, MoO3, TeO2 or NiO is indirectly formed as a secondary semiconductor layer by oxidizing the metal layer.Preferably, in the step S2, TiO2, WO3, MoO3, TeO2 or NiO is directly deposited to form as a second semiconductor layer on the first semiconductor layer via PVD, PECVD, LPCVD or ALD, and a metal layer of Ti, W, Mo, Te or Ni is deposited to form on the second semiconductor layer via PVD, PECVD, LPCVD or ALD; and in the step S3, a third semiconductor layer is formed during the process of printing and sintering to form the metal electrode, a metal alloy is formed at a location where the third semiconductor layer contacts the metal electrode, and TiO2, WO3, MoO3, TeO2 or NiO is formed by oxidation at other locations.Preferably, an encapsulation layer is formed on the secondary semiconductor layer; the encapsulation layer is formed prior to the printing of a paste in the step S3, and the metal electrode extends through the encapsulation layer to contact with the secondary semiconductor layer.Compared with the prior art, the present invention at least has the following beneficial effects:1. By forming a first semiconductor layer of doped polysilicon and a secondary semiconductor layer comprising an oxide of Ti, W, Mo, Te or Ni over the tunneling oxide layer of the silicon wafer, the secondary semiconductor layer that is in contact with the metal electrode plays the role to block the diffusion of metal into the first semiconductor layer. Thereby avoiding the damage to the passivation characteristics of polysilicon caused by metal diffusion, so that the thickness of the first semiconductor layer can be controlled, the parasitic absorption of light by the thick polysilicon layer is reduced, and the photoelectric conversion efficiency is improved.2. The secondary semiconductor layer blocks the diffusion of aluminium into the polysilicon, thereby avoiding the problem of reduced doping efficiency caused by P-type doping induced by Al diffusion on the N-type polysilicon. Meanwhile, the secondary semiconductor layer exhibits good contact resistance with aluminium, thereby enabling the use of low-cost metal electrodes—such as aluminium—on both P-type and N-type regions.3. The secondary semiconductor layer can be fabricated using the same processes as the first semiconductor layer; it can carry out low-temperature process yet maintain high-temperature stability, ensuring it remains unaffected during subsequent high-temperature process. Consequently, it can be fabricated based on existing solar cell manufacturing processes without requiring additional processing steps. BRIEF DESCRIPTION OF THE DRAWINGSFig. 1 is a schematic diagram illustrating step S1 of the manufacturing process for the solar cell structure with a multi-layer semiconductor layer of Embodiment 1;Fig. 2 is a schematic diagram illustrating step S2 of the manufacturing process for the solar cell structure with a multi-layer semiconductor layer of Embodiment 1;Fig. 3 is a schematic diagram illustrating step S3.1 of the manufacturing process for the solar cell structure with a multi-layer semiconductor layer of Embodiment 1;Fig. 4 is a schematic diagram illustrating step S3.2 of the manufacturing process for the solar cell structure with a multi-layer semiconductor layer of Embodiment 1;Fig. 5 is a schematic structural diagram of the solar cell structure with a multi-layer semiconductor layer of Embodiments 1-3;Fig. 6 is a graph showing light absorption coefficient characteristics of different materials;Fig. 7 is a graph showing contact resistance characteristics between different materials and Al;Fig. 8 is a schematic diagram illustrating charge energy loss in Embodiment 1 and Embodiment 2;Fig. 9 is a schematic diagram illustrating light reflection in Embodiment 1 and Embodiment 2;Fig. 10 illustrates the metal alloy formation process for the solar cell structure with a multi-layer semiconductor layer of Embodiment 3;Fig. 11 illustrates the metal electrode formation process for the solar cell structure with a multi-layer semiconductor layer of Embodiment 1 and Embodiment 3;Fig. 12 is a theoretical simulation graph of Al diffusion lengths of different materials;Fig. 13 is a graph comparing PL values ​​of Ti and TiO2 in high-temperature sintering experiments; andFig. 14 shows contact resistivity between different materials and Al metal electrodes.Reference numerals:1: tunneling oxide layer; 2: first semiconductor layer; 3: second semiconductor layer; 4: encapsulation layer; 5: metal electrode. DETAILED DESCRIPTION OF THE PRESENT INVENTIONTo make the objectives, features and advantages of the present invention more apparent and easily understood, the present invention will be described in further detail below with reference to the accompanying drawings and specific embodiments.Embodiment 1In this embodiment, the solar cell structure with a multi-layer semiconductor layer comprises: a silicon wafer; a tunneling oxide layer 1, a first semiconductor layer 2, a second semiconductor layer 3, an encapsulation layer 4 and a metal electrode 5 formed on the silicon wafer. The second semiconductor layer 3 is formed entirely over the first semiconductor layer 2, the encapsulation layer 4 is formed over the second semiconductor layer 3, and the metal electrode 5 extends through the encapsulation layer 4 to contact with the second semiconductor layer 3. Wherein, the first semiconductor layer 2 is a phosphorus-doped polysilicon layer, and the metal electrode 5 is an Al electrode.In this embodiment, referring to Figs. 1-4, a manufacturing process for the solar cell structure with a multi-layer semiconductor layer, comprising the following steps:S1: As shown in Fig. 1, a tunneling oxide layer and a phosphorus-doped polysilicon layer are formed on the back surface of a silicon wafer. The tunneling oxide layer is formed via oxidation in vacuum equipment and has a thickness of 1 to 2 nm. The phosphorus-doped polysilicon layer is deposited via LPCVD and has a thickness of 20 nm. Wherein, the tunneling oxide layer may alternatively be formed on the silicon wafer via thermal treatment or a wet process. The phosphorus-doped polysilicon layer may be formed via deposition using method such as PVD or PECVD. Phosphorus or other dopants may be co-deposited with the polysilicon, implanted via a diffusion furnace, or prepared using various other processes.S2: As shown in Fig. 2, TiO₂ is deposited to form as the second semiconductor layer on the phosphorus-doped polysilicon layer via PVD, with a thickness of 60 nm. Alternative deposition processes for the second semiconductor layer may also be vacuum deposition methods such as PECVD or ALD, or paste printing process. The secondary semiconductor layer may be doped with other elements, the dopant may be one or more of aluminium (Al), boron (B), vanadium (V), niobium (Nb), nitrogen (N) and oxygen (O). The dopant content is 0 to 5 wt%. Chemical reaction may occur between the phosphorus-doped polysilicon layer and the second semiconductor layer, which produces other substances; plus silicides together, the total thickness is less than 5 nm.S3.1: Referring to Fig. 3, SiNx is deposited to form as encapsulation layer onto the second semiconductor layer with a thickness of 30 nm. The encapsulation layer may be a single layer formed of SiNx, SiOx, AlOx or SiON, or a multilayer film containing these materials. The total thickness of the encapsulation layer is determined according to the thickness of the underlying second semiconductor layer, with a deposition thickness range of 10 nm to 80 nm. The encapsulation layer serves to reduce light reflection at the cell surface and increase light absorptivity, thereby enhancing the photoelectric conversion efficiency. Additionally, it can provide more hydrogen to effectively fill defects on the surface or at the interface of the semiconductor material, thereby reducing charge carrier recombination. However, this process is optional and may be omitted, as shown in Fig. 5(a).S3.2: Referring to Fig. 4, laser is used to form contact holes on the encapsulation layer, followed by the printing of aluminium paste using a screen printer and a rapid thermal treatment step to form an Al metal electrode. The peak temperature for the rapid thermal treatment step is 920℃. When aluminium paste is used, the paste may contain silicon composition in a range of 0 to 20 wt%. Alternatively, the metal paste may be electrode paste made of one of copper, silver and aluminum, or a mixture thereof. After rapid thermal treatment, the Al metal electrode direct contacts with the second semiconductor layer but does not contact the underlying phosphorus-doped polysilicon layer.The advantages of forming a secondary semiconductor layer on the polysilicon layer, compared to the prior art, are as follows:Ease of controlling the polysilicon thickness: When traditional metal electrodes directly contact with polysilicon, metal ion diffusion and peak effects necessitate the polysilicon layer to reach more than a specific thinkness, making it difficult to fabricate a thinner polysilicon layer. It is difficult to reduce the light absorption caused by a thick polysilicon layer; furthermore, low current at the back surface limits improvements in bifacial efficiency. In the present invention, the metal electrode contacts with the second semiconductor layer rather than the underlying polysilicon, thereby allowing the polysilicon layer to be thinned to address the aforementioned issues. Moreover, the wider band gap of the second semiconductor layer further reduces light absorption loss, as shown in Fig. 6; effectively reducing the thickness of polysilicon further minimizes light absorption, thereby reducing the current loss as much as possible.2. Application of low-cost electrode pastes: When forming electrodes on traditional N-type polysilicon using aluminium electrode pastes, reaction between the aluminium and the polysilicon may lead to P-type doping, or the aluminium can diffuse through the polysilicon to degrade cell characteristics. The second semiconductor layer effectively blocks the diffusion of aluminium from the metal electrode into the polysilicon and exhibits excellent contact resistance characteristics with aluminium. As shown in Fig. 7, the second semiconductor layer facilitates electron transport, offers low contact resistance with the electrode, and results in no FF (fill factor) loss; consequently, low-cost metal electrodes such as aluminium can be used.3. Simplified manufacturing process: The second semiconductor layer can be formed using the same manufacturing processes as the polysilicon. It can carry out low-temperature process yet possesses high-temperature stability, ensuring it remains unaffected during subsequent high-temperature process, thus it can be applied to existing solar cell manufacturing processes without requiring additional processing steps.Embodiment 2In this embodiment, as shown in Fig. 5(b), the solar cell structure with a multi-layer semiconductor layer comprises: a silicon wafer; a tunneling oxide layer 1, a first semiconductor layer 2, a second semiconductor layer 3, a third semiconductor layer 6 and a metal electrode 5 formed on the silicon wafer. The second semiconductor layer 3 and the third semiconductor layer 6 are formed sequentially and entirely over the first semiconductor layer 2, and the metal electrode 5 is in contact with the third semiconductor layer 6. Wherein, the first semiconductor layer 2 is a phosphorus-doped polysilicon layer, and the metal electrode 5 is an Al electrode.In this embodiment, a manufacturing process for the solar cell structure with a multi-layer semiconductor layer, comprising the following steps:S1: A tunneling oxide layer and a phosphorus-doped polysilicon layer are formed on the back surface of a silicon wafer. The thickness of the tunneling oxide layer is 1 to 2 nm, and the thickness of the phosphorus-doped polysilicon layer is 20 nm.S2: TiO₂ is deposited to form on the phosphorus-doped polysilicon layer, as a second semiconductor layer, with a thickness of 60 nm; and WO₃ is deposited to form on the second semiconductor layer, as a third semiconductor layer, with a thickness of 30 nm. In other embodiments, the secondary semiconductor layer may also be the following combinations: the second semiconductor layer is TiO₂ / the third semiconductor layer is aluminium-doped TiOx (Al-doped TiOx); or the second semiconductor layer is TiO₂ / the third semiconductor layer is MoO₃.S3: An aluminium paste is printed using a screen printer, followed by a rapid thermal treatment step to form an Al metal electrode at the aluminium paste printed locations. The peak temperature for the rapid thermal treatment step is 920℃. After rapid thermal treatment, the Al metal electrode directly contacts with the third semiconductor layer but does not contact the underlying second semiconductor layer or phosphorus-doped polysilicon layer.Compared to the single-layer semiconductor layer of Embodiment 1, the dual-layer semiconductor layer offers the following technical advantages:1. Lower charge energy loss: The height difference of energy level within the dual-layer semiconductor layer is small, and the band alignment between the metal electrode and the doped polysilicon results in lower energy loss (see Fig. 8);2. Smaller light loss on the back surface: The dual-layer structure makes the refractive index from high to low, resulting in lower reflectivity on the back surface; this improves the bifaciality of the solar cell and enhances the photoelectric conversion efficiency (see Fig. 9).Embodiment 3In this embodiment, as shown in Fig. 5(c), the solar cell structure with a multi-layer semiconductor layer comprises: a silicon wafer; a tunneling oxide layer 1, a first semiconductor layer 2, a second semiconductor layer 3, a third semiconductor layer 6 and a metal electrode 5 formed on the silicon wafer. The second semiconductor layer 3 and the third semiconductor layer 6 are formed sequentially and entirely over the first semiconductor layer 2, and the metal electrode 5 is in contact with the third semiconductor layer 6. Wherein, the first semiconductor layer 2 is a phosphorus-doped polysilicon layer, the metal electrode 5 is an Al electrode, and a metal alloy is formed at the interface between the metal electrode 5 and the third semiconductor layer 6.In this embodiment, a manufacturing process for the solar cell structure with a multi-layer semiconductor layer, comprising the following steps:S1: A tunneling oxide layer and a phosphorus-doped polysilicon layer are formed on the back surface of a silicon wafer. The thickness of the tunneling oxide layer is 1 to 2 nm, and the thickness of the phosphorus-doped polyslicon layer is 20 nm.S2: TiO₂ is deposited to form on the phosphorus-doped polysilicon layer, as a second semiconductor layer, with a thickness of 60 nm; and a Ti metal layer is deposited to form on the second semiconductor layer, with a thickness of 15 nm. S3: An aluminium paste is printed using a screen printer, followed by a rapid thermal treatment step to form an Al metal electrode at the aluminium paste printed locations. The Ti metal layer is subjected to a thermal treatment to become a third semiconductor layer. Wherein, a TiAl metal alloy is formed via high-temperature reaction at the interface between the Al metal electrode and the Ti metal layer, whereas TiO₂ is formed via oxidation at other locations, resulting in forming a third semiconductor layer with a unique TiO₂-TiAl-TiO₂ structure, see Fig. 10. Referring to the diagram on the left side of Fig. 11, when Al metal contacts with the second semiconductor, the second semiconductor provides an oxygen source during the metal paste sintering process (peak temperature >700°C). It can lead to the formation of metal oxides (such as Al₂O₃) at the interface between Al metal and the second semiconductor, potentially causing higher non-uniform contact resistance. Inserting a metal alloy like TiAl between Al metal and the second semiconductor prevents metal oxidation due to the alloy's excellent oxidation resistance, thereby forming a good and uniform contact. However, metal alloys have higher light reflectivity. Regarding the bifaciality of the solar cell, light incidence on both surfaces must be considered.In Embodiment 3, the TiAl metal alloy is formed via self-aligned reaction between the second semiconductor and the Ti metal layer, as illustrated on the right side of Fig. 11. The TiAl metal alloy is formed only in the contact area between the Al paste and Ti metal, while TiO₂ is formed in other areas due to oxidation of Ti during sintering process. Since TiO₂ is highly transparent, it does not block light from entering into the Si wafer, enabling the TOPCon cell to achieve a favorable bifaciality.Furthermore, the following tests were conducted to evaluate the semiconductor layer's ability to block metal diffusion and to measure contact resistance.Fig. 12 is a theoretical simulation graph of Al metal diffusion lengths of different materials. It can be seen that it is difficult for the Ti metal layer to block the diffusion of Al into the silicon wafer at high temperature.Fig. 13 shows PL values of high-temperature sintering experiments, and the experiment result confirms the correctness of the theoretical estimates. During high-temperature sintering process, if a TiO₂ layer of appropriate thickness can effectively block the diffusion of Al into the silicon wafer. The Ti metal layer exhibits lower photoluminescence (PL) intensity, indicating that Al has diffused into the wafer and damaged the passivation layer. Therefore, a Ti metal layer alone cannot serve as an Al diffusion blocking layer.Fig. 14 shows the contact resistivity between various materials and the Al metal electrode. The data in figure shows that the contact resistivity between TiO₂ and Al is only 1.75 mohmcm. In contrast, Ti deposited on TiO₂ transforms into TiAl during sintering process in contact with the Al paste, resulting in lower contact resistance compared with TiO₂ alone. The Ti metal layers with a thickness ranging from 10 nm to 30 nm exhibit a contact resistivity ​​below 1.5 mohmcm, demonstrating excellent metal contact performance.The technical schemes provided by the present invention have been described in detail above, and specific examples have been used to illustrate the principles and implementations of the present invention. The descriptions of the above embodiments are intended solely to facilitate the understanding of the method and core concepts of the present invention. Furthermore, those skilled in the art may make modifications to the specific implementations and application scopes based on the concepts of the present invention. Therefore, the content of this specification should not be construed as limiting the present invention. 

Claims

1. A solar cell structure with a multi-layer semiconductor layer, comprising: a silicon wafer; a first semiconductor layer (2), a secondary semiconductor layer and a metal electrode (5) formed on the silicon wafer, wherein the secondary semiconductor layer is formed locally or entirely over the first semiconductor layer (2), and the metal electrode (5) is in contact with the secondary semiconductor layer;the material of the first semiconductor layer (2) comprises polysilicon doped with phosphorus (P) or boron (B); andthe material of the secondary semiconductor layer comprises a single layer or a combination of multiple layers of TiO2, WO3, MoO3, TeO2 or NiO.

2. The solar cell structure with a multi-layer semiconductor layer according to claim 1, wherein the secondary semiconductor layer comprises a second semiconductor layer (3) formed on the first semiconductor layer (2), and the metal electrode (5) is in contact with the second semiconductor layer (3).

3. The solar cell structure with a multi-layer semiconductor layer according to claim 2, wherein a metal alloy is formed at the interface between the metal electrode (5) and the second semiconductor layer (3), and the metal alloy is formed from reaction between the metal electrode (5) and the metal element of the material of the second semiconductor layer (3).

4. The solar cell structure with a multi-layer semiconductor layer according to claim 1, wherein the secondary semiconductor layer comprises a second semiconductor layer (2) and a third semiconductor layer formed sequentially on the first semiconductor layer (2), and the metal electrode (5) is in contact with the third semiconductor layer.

5. The solar cell structure with a multi-layer semiconductor layer according to claim 4, wherein a metal alloy is formed at the interface between the metal electrode (5) and the third semiconductor layer, and the metal alloy is formed from reaction between the metal electrode (5) and the metal element of the material of the third semiconductor layer.

6. The solar cell structure with a multi-layer semiconductor layer according to claim 1, wherein the metal electrode (5) contains Al, Ag, Cu or a mixture thereof.

7. The solar cell structure with a multi-layer semiconductor layer and the manufacturing process thereof according to claim 1, wherein the thickness of the first semiconductor layer (2) is 20 to 100 nm, and the thickness of the secondary semiconductor layer is 10 to 100 nm.

8. The solar cell structure with a multi-layer semiconductor layer and the manufacturing process thereof according to claim 1, further comprising an encapsulation layer (4) formed on the secondary semiconductor layer, wherein the encapsulation layer (4) is a single layer or a combination of multiple layers of SiNx, SiOx, SiONx or Al2O3, and the thickness of the encapsulation layer (4) is 10 to 80 nm.

9. The solar cell structure with a multi-layer semiconductor layer according to claim 1, wherein the secondary semiconductor layer contains a dopant, the content of the dopant is 0 to 5 wt%, and the dopant comprises one or more of aluminium (Al), boron (B), vanadium (V), niobium (Nb), nitrogen (N) and oxygen (O).

10. A manufacturing process for a solar cell structure with a multi-layer semiconductor layer according to any one of claims 1-9, comprising the following steps:S1: forming a first semiconductor layer (2) on a silicon wafer via deposition and doping;S2: forming a secondary semiconductor layer on the first semiconductor layer (2) via deposition; andS3: forming a metal electrode (5) on the secondary semiconductor layer by printing a paste and sintering, so that the metal electrode (5) is in contact with the secondary semiconductor layer.

11. The manufacturing process for a solar cell structure with a multi-layer semiconductor layer according to claim 10, wherein, in the step S2, TiO2, WO3, MoO3, TeO2 or NiO is directly deposited to form as a secondary semiconductor layer on the first semiconductor layer (2) via PVD, PECVD, LPCVD or ALD.

12. The manufacturing process for a solar cell structure with a multi-layer semiconductor layer according to claim 10, wherein, in the step S2, a metal layer of Ti, W, Mo, Te or Ni is deposited to form on the first semiconductor layer (2) via PVD, PECVD, LPCVD or ALD, and subsequently, TiO2, WO3, MoO3, TeO2 or NiO is indirectly formed as a secondary semiconductor layer by oxidizing the metal layer.

13. The manufacturing process for a solar cell structure with a multi-layer semiconductor layer according to claim 10, wherein, in the step S2, TiO2, WO3, MoO3, TeO2 or NiO is directly deposted to form as a second semiconductor layer (3) on the first semiconductor layer (2) via PVD, PECVD, LPCVD or ALD, and a metal layer of Ti, W, Mo, Te or Ni is deposited to form on the second semiconductor layer (3) via PVD, PECVD, LPCVD or ALD; and in the step S3, a third semiconductor layer is formed during the process of printing and sintering to form the metal electrode (5), a metal alloy is formed at a location where the third semiconductor layer contacts the metal electrode (5), and TiO2, WO3, MoO3, TeO2 or NiO is formed by oxidation at other locations.

14. The manufacturing process for a solar cell structure with a multi-layer semiconductor layer according to claim 10, wherein an encapsulation layer (4) is formed on the secondary semiconductor layer; the encapsulation layer (4) is formed prior to the printing of a paste in the step S3, and the metal electrode (5) extends through the encapsulation layer (4) to contact with the secondary semiconductor layer.