Internal storage management method of error diffusion method and its half colour tint treatment module

Abstract

The present invention relates to an internal storage management method of error diffusion method and its half-tone processing module. It is mainly characterized by the following steps: cutting the image to be undergone the half-tone processing into several smaller blocks, every block is less than size of SRAM, then according to the error diffusion method progressively making half-tone processing, and for the bounded portion of every block which can not be processed adopting filling mode and the mode of remaining to next block to implement the processing of all the pixels in block so as to improve SRAM space waste and the problem of occupying DRAM, and can raise processing efficiency.

Description

technical field [0001] The invention relates to a memory management method applied to image halftone processing, in particular to a memory management method for cutting an image to be processed into multiple blocks for error diffusion processing and a halftone processing module thereof. Background technique [0002] A Multi Function Peripheral (MFP) is a machine that simultaneously has the functions of scanning (scan), printing (print), copying (copy) and fax (fax). The function of copying is to input by scanning, or It is to reuse the function of copying and then print it out to obtain a copied image. And because the image data obtained by scanning is the image data under the primary color of RGB, and the printout terminal can only process the image data under the primary color of KCMY, therefore, the image processing chips inside the multifunction business machine all have color conversion (color conversion) processing function. [0003] On the other hand, since the imag...

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Problems solved by technology

[0005] The traditional method is to store the three columns of pixel data to be processed in dynamic random access memory (DRAM, hereinafter replaced by DRAM). Therefore, in the process of error diffusion processing, the data in DRAM must be continuously read and written. Action, the efficiency of accessing DRAM is not obvious, and because the pixels to be processed and the pixels diffused around are discontinuous addresses in DRAM, the high-speed (burst) mode in DRAM cannot be applied

However, if the three columns of pixel data are stored in the static random access memory (SRAM, hereinafter represented by SRAM) in the image processing chip, this precious space will be wasted too much

[0006] In order to solve this problem, U.S. Patent No. 6014227 proposes a method of corresponding memory size according to the number of nozzle holes to effectively manage memory and improve the efficiency of memory usage; however, the whole method is very limited by the number of nozzle holes, and the use rather inflexible

Another example is U.S. Patent No. 6006011, which stores the entire image in DRAM and takes it out one by one for error diffusion calculations. However, this approach not only limits the size of the image to be smaller than the size of the DRAM, but also requires Consumes a considerable amount of memory space

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