Multi-wafer piling base plate and multi-wafer piling encapsulation structure based on this base plate

Abstract

The invention relates to a multi-chip stacking base plate, packaging structure and use thereof. The base plate at least includes one first wire bonding, one second wire bonding, one trace for electrical transmission and one loop. Both of the first wire bonding and the second wire bonding are dying bonding region near the base plate. The loop concatenates in series the first wire bonding and the second wire bonding and connects to the trace. Consequently, a plurality of chips can arrange by arrange in the dying bonding region and electrically connect into these wire bonding, and each chip can work independently without mutual interference. The multi-chip stacking packaging structure using the base plate can carry out the repair working without seal line after molding.

Description

technical field [0001] The invention relates to a circuit substrate suitable for semiconductor packaging, in particular to a multi-chip stacked substrate, a multi-chip stack package structure (multi-chip stackpackage) using the substrate and its application. Background technique [0002] Due to the continuous evolution of electronic technology, products with more complex functions and more user-friendly products are introduced. In terms of the appearance of electronic products, they are also designed towards the trend of light, thin, short and small. With increasing demands for miniaturization and high operating speed, a plurality of chips will be vertically stacked on a substrate to achieve multiple capacity or more functional demands. All stacked chips will be sealed in a package, which can be called a multi-chip stack package structure. However, it is conventionally known that when carrying out a multi-chip stacked packaging structure, a sealant is used to seal the plura...

AI Technical Summary

Problems solved by technology

This method requires the engineering of testing and removing bad bonding wires before sealing, the quality after sealing is still uncertain and there will be additional process restrictions

In addition, the stacking method is that good dies are stacked on bad dies, not dedicated to multi-die stacked package configurations

[0006] It can be seen that the above-mentioned existing multi-chip stacked substrate obviously still has inconvenience and defects in structure and use, and needs to be further improved urgently.

In order to solve the above-mentioned problems, the relevant manufacturers have tried their best to find a solution, but no suitable design has been developed for a long time, and the general products do not have a suitable structure to solve the above-mentioned problems. This is obviously related. The problem that the industry is eager to solve

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