Method, apparatus and system for controlling synchronization clock of communication interface
A communication interface, synchronous clock technology, applied in time division multiplexing systems, multiplexing communication, instruments, etc., can solve the problems of detecting whether the asynchronous design timing meets the design requirements, difficult to use, poor stability, etc., to achieve savings The effect of system power consumption
Inactive Publication Date: 2011-06-08
VIMICRO CORP
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Moreover, the asynchronous design is greatly affected by the process, and the stability is relatively poor; it is difficult to use electronic design automation (EDA) tools to detect whether the timing of the asynchronous design meets the design requirements.
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[0039] In order to make the technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.
[0040] In view of the various advantages of the synchronous design, in the technical solution proposed by the present invention, the synchronous design using the clock is still considered for the communication interface between the baseband processor and the audio processor. The inventor of the present invention further considers that in the audio processor, there are not only digital modules and digital module control registers, but also analog devices and analog device control registers. Generally, analog devices and digital modules need to work together, but in practical applications , there is often a situation where the analog device needs to work, but the digital module does not work, and because the configuration of the analog device contro...
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The invention provides a method for controlling the synchronous clock of the communication interface, comprises as follow: the logical operation result is obtained by using the control signal to control the control signal to do logical operation with the outside clock signal; The logical operation result is inputted into the communication interface and the synchronous clock of the communication interface is opened or closed according to the logical operation result. The invention also provides a device and system based on the method for controlling the synchronous clock of the communication interface. By realizing the technology scheme of the invention, the invention can adopt synchronous design on the communication interface; meanwhile the intention to save the power of the system on which the communication interface is arranged is achieved.
Description
technical field [0001] The invention relates to the technical field of ASIC design, in particular to a method, device and system for controlling a synchronous clock of a communication interface. Background technique [0002] In ASIC design, compared with asynchronous design, synchronous design is easy to design and modify, and has little relationship with process. In view of this, in ASIC design, synchronous design is usually given priority to realize the circuit. [0003] see figure 1 , figure 1 It is the connection diagram of the baseband processor and the audio processor in the mobile terminal system. exist figure 1 In the system shown, the baseband processor passes through the internal integrated circuit (I 2 C) or Serial Peripheral Interface (SPI) bus to control the audio processor. Due to the presence of registers and digital modules in the audio processor, the communication interface between the baseband processor and the audio processor often adopts a synchronou...
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IPC IPC(8): G06F13/42H04J3/06
CPCY02B60/1228Y02B60/1235Y02D10/00
Inventor 杨作兴
Owner VIMICRO CORP