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Non-volatile memorizer writing method

A non-volatile memory technology, applied in static memory, read-only memory, information storage, etc., can solve the problem of slow writing speed and achieve the effect of improving the writing speed

Inactive Publication Date: 2008-07-02
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the writing speed of the above-mentioned non-volatile semiconductor memory writing method is relatively slow.

Method used

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Embodiment Construction

[0031] The essence of the present invention is to increase the voltage difference between the source and the drain by setting the source voltage of the non-volatile memory to a negative value and setting the semiconductor substrate voltage of the non-volatile memory to a negative value, And the voltage between the gate and the semiconductor substrate, thereby increasing the writing speed of the non-volatile memory.

[0032] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0033] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many ways other than those described here, and those skilled in the art can make similar extensions without departing from ...

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Abstract

The invention relates to a writing method of a non-volatile memory and provides a non-volatile semiconductor memory. The memory includes a semiconductor substrate, a three-layer stacking structure of a dielectric layer-a capture charge layer-a dielectric layer arranged on the semiconductor substrate in sequence, a gate as well as a source cathode and a drain arranged on the two sides of the three-layer stacking structure of the dielectric layer-the capture charge layer-the dielectric layer in the semiconductor substrate. The method includes the processes: a first voltage is applied on the source cathode of the non-volatile memory and a negative value or 0 is obtained; a second voltage is applied on the drain of the non-volatile memory; a third voltage is applied on the semiconductor substrate of the non-volatile memory and the negative value and 0 is obtained; the fourth voltage is applied on the gate of the non-volatile memory. The writing method of the non-volatile memory increases writing speed of the memory.

Description

technical field [0001] The invention relates to a writing method of a non-volatile memory, in particular to a writing method of a double-byte non-volatile memory containing an electron trapping layer. Background technique [0002] In general, semiconductor memory for storing data is classified into volatile memory and nonvolatile memory. Volatile memory tends to lose data when power is interrupted, while nonvolatile memory retains data even when power is interrupted. Compared with other non-volatile storage technologies (eg, disk drives), non-volatile semiconductor memories are relatively small, and therefore, non-volatile semiconductor memories have been widely used in mobile communication systems, memory cards, and the like. [0003] figure 1 The structure shown is a schematic structural diagram of a non-volatile memory with a charge-trapping layer. Such as figure 1 As shown in , the semiconductor substrate 11 includes a first doped region 12a and a second doped region ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/115H01L29/792G11C16/10H10B69/00
Inventor ZHONG CANMU WEIQUANCHEN LIANGCHENGLIU JIANCHANG
Owner SEMICON MFG INT (SHANGHAI) CORP