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Connection method for chip and bearer

A bonding method and carrier technology, applied in the field of bonding, can solve problems such as electrical short circuit of pads, and achieve the effect of reducing the possibility of electrical short circuit

Inactive Publication Date: 2008-08-13
CHIPMOS TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, there are often impurities attached between the pads on the chip, which may even cause an electrical short circuit between the pads

Method used

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  • Connection method for chip and bearer
  • Connection method for chip and bearer
  • Connection method for chip and bearer

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0030] 1A to 1C are cross-sectional views of a bonding method of a chip and a carrier according to a first embodiment of the present invention. Please refer to FIG. 1A , the bonding method of the chip and the carrier in this embodiment includes the following steps. First, a wafer 10 is provided, and the wafer 10 has a plurality of pads 120 and a plurality of bumps 130 respectively disposed on the pads. The bumps 130 may be gold bumps, tin bumps or wire bonding bumps, wherein the wire bonding bumps are formed by wire bonding techniques. In this embodiment, the bumps 130 are gold bumps.

[0031] Please continue to refer to FIG. 1A, a two-level adhesive layer 140a is formed on the wafer 10 to cover the bumps 130, wherein the method for forming the two-level adhesive layer 140a includes a spin-coating process or a printing process. . In more detail, the adhesive layer 140a is in a liquid state at the stage A for easy coating on the wafer 10 , is partially cured and semi-solid a...

no. 2 example

[0036] 2A to 2C are cross-sectional views of a bonding method of a chip and a carrier according to a second embodiment of the present invention. Please refer to FIG. 2A , this embodiment is similar to the first embodiment, the difference is that an indium layer 150 is firstly formed on the bump 130 before forming the adhesive layer 140 a with two-level characteristics.

[0037] Referring to FIGS. 2B and 2C , a tin layer 230 is formed on the contact 220 . Then, through a bonding process S100 , the contacts 220 of the carrier 200 and the bumps 130 of the chip 110 are bonded. In this embodiment, the bonding process S100 is a thermocompression bonding process. So far, the bonding between the carrier 200 and the chip 110 has been completed. However, in order to save the process time, preferably, a curing process may also be performed after the bonding process S100 , so as to speed up the complete curing of the adhesive layer into the C-stage adhesive layer 140c.

no. 3 example

[0039] 3A to 3C are cross-sectional views of a bonding method of a chip and a carrier according to a third embodiment of the present invention. Please refer to FIG. 3A . The content shown in FIG. 3A is the same as that shown in FIG. 1A .

[0040] Please refer to FIG. 3B , this embodiment is similar to the first embodiment, except that an indium layer 240 is formed on the tin layer 230 .

[0041] Please refer to FIG. 3B and FIG. 3C , and then, a bonding process S100 is performed to bond the contacts 220 of the carrier 200 and the bumps 130 of the chip 110 . In addition, in order to save the process time, preferably, a curing process may also be performed after the bonding process S100, so as to speed up the complete curing of the adhesive layer into the C-stage adhesive layer 140c.

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Abstract

The invention disclsoes joint method of a chip and a bearing device. A wafer is provided, which has a plurality of connecting pad and a plurality lugs arranged on the connecting pad. An adhesive layer with two stage characteristics is form on the wafter to coat the lug. The adhesive layer with two stage characteristics is pre-solidified to be a B-stage adhesive layer which is partially solidified. A plurality of chip are formed by cutting the wafer. A bearing device comprises a substrate and a plurality of contacts arrangded on the substrate. A joint processing joints the contacts of the bearing device and the lugs of the chip. The method can prevent the impurities between the connecting pad of the chip and the lugs so as to have a high processing qualified rate.

Description

technical field [0001] The present invention relates to a bonding method, and in particular to a bonding method between a chip and a carrier. Background technique [0002] In recent years, with the continuous maturity and development of semiconductor process technology, various high-efficiency electronic products have been continuously introduced, and the integration of integrated circuit (Integrated Circuit, IC) components has also been continuously improved. In the packaging process of integrated circuit components, integrated circuit packaging (IC packaging) plays a very important role, and the types of integrated circuit packaging can be roughly divided into wire bonding packaging (WB packaging), tape automatic bonding packaging (tape automatic bonding packaging, TAB packaging) and flip chip packaging (flip chip packaging, FC packaging) and other types, and each packaging form has its particularity and application field. [0003] As for the tape-attached automatic bondi...

Claims

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Application Information

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IPC IPC(8): H01L21/50H01L21/60
Inventor 黄祥铭刘安鸿李宜璋林勇志何淑静
Owner CHIPMOS TECH INC