Reading operation control method of memory body
A control method and read operation technology, which is applied in the field of memory read operation control, can solve problems such as prone to errors and data conflicts
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[0028] Please refer to figure 1 , which shows a schematic diagram of memory access control according to an embodiment of the present invention. A memory bank (memory bank) 101 is coupled to a register 102 and a first-in-first-out register (FIFO) 103 through a data bus (ie, a bus, hereinafter referred to as a bus) 110 . The CRC operation unit 105 is coupled to the register 102 and the I / O buffer 106 . An off-chip driver calibration circuit (off-chip driver, OCD) 104 is coupled to the first-in-first-out register 103 . The decoder 107 is coupled to a read timing simulator (read timer) 108 . A CRC timing simulator (CRC timer) 109 is coupled to the read timing simulator 108 and the I / O buffer 106 . The decoder 111 is coupled to a column decoder 112 .
[0029] The data read from the memory bank 101 is sent to the register 102 and the first-in-first-out register 103 through the data bus 110 .
[0030] The register 102 is used for temporarily storing the read data, so that the s...
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