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Memory access method

An access method and memory technology, applied in static memory, digital memory information, information storage, etc., can solve the problems of increasing power consumption, wasting memory access time, etc.

Active Publication Date: 2009-01-21
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In this way, not only the memory access time is wasted, but also the power consumption is increased

Method used

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Embodiment Construction

[0030] The present invention provides a memory access method, which redefines the data corresponding to the critical voltage distribution of the memory cell, and uses a brand-new operation method to write the data into the memory cell, and then enables the word line with fewer times The data stored in the memory unit is judged, the memory access time is saved, and the power consumption of the memory is reduced.

[0031] Please refer to figure 2 , which shows a flow chart of a memory access method according to a preferred embodiment of the present invention. The memory access method is applied to a memory, such as a multi-level cell (MLC) nonvolatile memory or an N-bit (N-bit) memory. The memory has multiple multi-level cells, and each memory cell can store 2n bits, where n is a positive integer. Next, n=2 is taken as an example for illustration. Each multi-level unit substantially includes a left bit and a right bit, and each half unit can store a data pair (2 bits). exis...

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Abstract

The invention relates to an access method of a memory, wherein the memory comprises a plurality of multi-layer units, each multi-layer unit can store 2n bits, and the n is a positive integer. The access method of the memory comprises that critical voltage of each multi-layer unit firstly is respectively defined at 2n layers, each layer corresponds to a n bit storage state, the highest efficiency bit of the storage state which corresponds to 0-2n / 2-1 layer is different from the highest efficiency bit of the storage state which corresponds to 2n / 2-2n-1 layer, then target data is separated into n parts and is respectively written into n scratch pad memories, and then n bits of the target data are written into the multi-layer units, and each bit is obtained from each scratch pad memory.

Description

technical field [0001] The present invention relates to a memory access method, and in particular to a memory access method utilizing a new memory access method to save memory access time and power consumption. Background technique [0002] Memory is used for various data storage purposes today. The memory includes various types, such as multi-bit cell (Multi-Bit Cell, MBC) memory or multi-level cell (Multi-Level Cell, MLC) memory. Please refer to Figure 1A , which shows a schematic diagram of a conventional multi-bit cell. Such as Figure 1A As shown, the left half cell of the multi-bit cell 100 is bit A, and the right half cell of the multi-bit cell 100 is bit B. Please refer to Figure 1B , which shows the distribution of threshold voltages for conventional multilevel cells. Among them, (layer 0, layer 1, layer 2, layer 3) is generally defined as (11, 10, 01, 00). [0003] Memory also includes memory that incorporates multi-level cell technology into multi-bit cell ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C7/22
Inventor 洪俊雄何文乔张坤龙
Owner MACRONIX INT CO LTD