Use method of dual-port SRAM in intelligent mobile phone

A technology of smart phones and application methods, applied in the direction of computers, digital computer parts, instruments, etc., can solve problems such as bottleneck blockage, affecting data processing ability, etc., to achieve the effect of improving running speed, improving processing ability, and being convenient to use

Inactive Publication Date: 2009-08-05
TECHFAITH INTELLIGENT HANDSET TECH BEIJING
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  • Application Information

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Problems solved by technology

If there is no interface capable of high-speed data transmission between systems or modules, it will easily cau

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  • Use method of dual-port SRAM in intelligent mobile phone
  • Use method of dual-port SRAM in intelligent mobile phone

Examples

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[0008] The internal structure diagram of the dual-port SRAM is shown in the figure: the external processor can access the storage unit 20 separately through the input / output units 10 and 11, and the accessed block is determined by the address decoders 30 and 31. Each time it is decoded, The interrupt arbitration unit 40 must determine the addresses to be accessed by the left and right channels. If the same block is accessed, 40 will send an interrupt to the external processor through the mailbox 50 to prevent the two processors from accessing the same area at the same time. Block, causing read and write errors. The dual-port SRAM of this architecture can significantly increase the access rate and reduce the software code complexity and reliability.

[0009] Attached Figure II It is the concrete realization of this dual-port SRAM on the Qualcomm MSM6280+Marvell PXA270 platform. MSM6280 and PXA270 each have an SRAM controller to communicate with external SRAM. We connect it to the l...

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Abstract

The invention discloses an application method of double-port SRAM in high-pass +Marvell PXA270 platform intelligent mobile phone. A high-pass MS6280+Marvell PXA270 platform is adopted in the application of the double-DSP intelligent mobile phone, wherein the high-pass CPU is a primary apparatus and the Marvell CPU is a secondary apparatus; the CYDM256B16-55BVXI of the SPSRAM device is used as a shared memory; the unique software subarea process design effectively realizes the communication between primary/secondary CPU in the intelligent mobile phone system such that the maximum communication rate can reach 400Mbit/s. The favourable effects of the invention are as follows: it is convenient to constitute the high-speed data transmission interface of various working modes; DPSRAM has important effects to ensure the smoothness of the data channel in data share of the parallel processing network and high-speed data transmission of running water mode such that it is able to effectively improve the processing capacity of data by the whole system, greatly improve the system operation speed and bring convenience for user.

Description

Technical field [0001] With the development of 3G technology, smart phones based on Windows operating system have strong processing capabilities to support application processors. PXA270+MSM6280 is a good match to meet this design requirement; dual-port SRAM is to replace serial and USB to achieve The ideal physical channel for high-speed transmission between the two. This solution elaborates the composition and realization of this architecture in detail. Background technique [0002] In high-speed data acquisition and processing systems, as the amount of sampled data increases and information processing tasks increase, the requirements for data transmission are getting higher and higher. At present, there are many dual system solutions on the market, that is, two processors form a master-slave system to complete the corresponding functions. The key to master-slave system design is the data communication between the host and the slave. The data communication between master and sl...

Claims

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Application Information

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IPC IPC(8): G06F15/167H04W88/02
Inventor 赵阳黎
Owner TECHFAITH INTELLIGENT HANDSET TECH BEIJING
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