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Dependent instruction thread scheduling

A thread and instruction technology, applied in the field of graphics processors, can solve problems such as low efficiency

Inactive Publication Date: 2009-08-12
QUALCOMM INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the method requires a complex detection scheme utilizing resources
Another technique used in conventional systems involves stalling instructions until the load instruction is complete, which results in inefficiency

Method used

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  • Dependent instruction thread scheduling
  • Dependent instruction thread scheduling
  • Dependent instruction thread scheduling

Examples

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Embodiment Construction

[0010] The word "exemplary" is used herein to mean "serving as an instance, instance, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or preferred over other embodiments.

[0011] figure 1 is a block diagram of a thread management system 100 according to an example embodiment of the present invention. except by reference figure 1 In addition to those discussed, thread management system 100 may include other processes, entities, engines, and / or functions. Can be implemented using any combination of hardware, software and / or firmware figure 1 The blocks illustrated in . Furthermore, may be implemented in any number of devices, circuits or elements figure 1 The functions and operations of the blocks described in . Two or more of the functional blocks may be integrated in a single device, and the functions described as performed in any single device may be implemented on several devices. An example of a suitab...

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Abstract

A thread scheduler includes context units for managing the execution of threads where each context unit includes a load reference counter for maintaining a counter value indicative of a difference between a number of data requests and a number of data returns associated with the particular context unit. A context controller of the thread context unit is configured to refrain from forwarding an instruction of a thread when the counter value is nonzero and the instruction includes a data dependency indicator indicating the instruction requires data returned by a previous instruction.

Description

technical field [0001] This disclosure relates generally to graphics processors and more specifically to thread scheduling of threads with dependent instructions. Background technique [0002] Dedicated processors are often used to perform specific functions associated with one type of application in order to efficiently and quickly perform operations associated with that application. For example, a graphics processor performs various graphics operations to process image data and reproduce images and efficiently manipulate and display computer graphics. Due to their highly parallel structure, graphics processors are more efficient than typical general-purpose processors for a wide variety of complex algorithms. A graphics processor implements several graphics primitive operations in such a way that performing the operations through a host central processing unit (CPU) is much faster than rendering the graphics directly to the screen. [0003] To efficiently utilize resourc...

Claims

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Application Information

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IPC IPC(8): G06F9/38
CPCG06F9/3851G06F9/3824G06F9/3838G06F9/38G06F9/06G06F9/32
Inventor 杜云于春戈尔夫·焦
Owner QUALCOMM INC