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Device and method for adjusting clock

A technology of clock adjustment and clock, applied in the field of communication

Active Publication Date: 2010-01-20
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The present invention is proposed in view of the problem that the relevant technology has not yet proposed an effective solution in the clock frequency margin test. Therefore, the main purpose of the present invention is to provide a clock adjustment device and method to solve the above problems

Method used

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  • Device and method for adjusting clock
  • Device and method for adjusting clock
  • Device and method for adjusting clock

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Experimental program
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Embodiment Construction

[0024] Functional Overview

[0025] Considering that the relevant technology has not yet proposed an effective solution for the clock frequency margin test, the embodiment of the present invention provides a clock adjustment scheme, by disconnecting the clock input of the original clock system from the clock source of the original system , connected to the clock adjustment device provided by the embodiment of the present invention, by changing the clock frequency, to find the clock frequency range in which the clock system can work normally.

[0026] It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and examples.

[0027] Device embodiment

[0028] According to an embodiment of the present invention, a clock adjustment device is provided. figure 1 is a structural...

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Abstract

The invention discloses a device and a method for adjusting a clock. The device comprises a stable clock source unit, a clock editing control unit, a clock frequency edit unit and a clock output unit, wherein the stable clock source unit is used for selecting a clock as a seed clock; the clock editing control unit is used for setting an algorithm of clock frequency conversion; the clock frequency edit unit is used for converting a clock selected by the stable clock source unit into the required clock according to the algorithm set by the clock editing control unit; and the clock output unit is used for adjusting a clock provided by the clock editing control unit according to the driving clock interface condition of a detected system and outputting the adjusted clock. The device and the method can easily acquire the occurrence of the working clock allowance of the detected system.

Description

technical field [0001] The present invention relates to the communication field, in particular to a clock adjustment device and method. Background technique [0002] With the deepening of circuit hardware testing, we not only need to ensure the correct implementation of the designed product functions and excellent performance through testing, but also do some clock margin testing to obtain specific performance indicators of the product, so that we can Have a comprehensive understanding of the designed product. At the same time, the clock margin test is also of great help to material selection, product maintenance and troubleshooting. [0003] At present, it is common to test the phase margin of the clock synchronization in a synchronous clock system, but this margin performance may directly cause a certain function to fail to be realized. We not only need to care about the function of the product, but in more cases we need to improve the performance of the product under th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L12/26H04L7/00H03L7/06G06F11/36
Inventor 黄健肖永
Owner ZTE CORP