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Arithmetic device for concurrently processing a plurality of threads

A computing device and thread technology, which is applied in the direction of machine execution devices, electrical digital data processing, redundant data error detection in computing, etc., can solve problems such as errors and low success rate of retrying

Inactive Publication Date: 2012-07-25
FUJITSU LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] (2) Error due to noise from adjacent wiring inside the hardware
Therefore, for example, the retry success rate when there is an error cause in the noise from other wiring is lower than that of a single-threaded processor

Method used

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  • Arithmetic device for concurrently processing a plurality of threads
  • Arithmetic device for concurrently processing a plurality of threads
  • Arithmetic device for concurrently processing a plurality of threads

Examples

Experimental program
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Embodiment Construction

[0048] Below, according to Figure 2 to Figure 8 Embodiments of the present invention will be described.

[0049] figure 2 It is a figure explaining the operating principle of the computing device 200 of this embodiment.

[0050] figure 2The arithmetic device 200 shown has an instruction execution circuit 201 for executing a plurality of threads, and an execution control circuit 202 for controlling the execution state or retry of each thread.

[0051] The command execution circuit 201 is a circuit that processes a plurality of threads composed of one or more command strings in parallel. For example, fetching of commands, decoding of commands, executing calculations, completing commands, instructing updates of programmable resources, checking for hardware errors during command execution, and the like are performed for each thread.

[0052] Furthermore, when a hardware error is detected during the execution of the instruction for each thread, the instruction execution circ...

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Abstract

A processor capable of concurrently processing sequences of instructions of a plurality of threads, which realizes a retry success rate similar to that of a processor for processing a sequence of instructions of a single thread. An arithmetic device (200) includes an instruction execution circuit (201) for executing the plurality of threads and an execution control circuit (202) for controlling execution conditions and re-execution of each thread.

Description

technical field [0001] The invention relates to a computing device that processes multiple threads at the same time, that is, a computing device with a hardware command retry function. Background technique [0002] In server processors that emphasize reliability, when an error is detected during command processing, command retry processing is performed in which a command that has been processed at that point is retried by hardware. For example, when the following errors occur, the program can be continued without terminating the program in an abnormal state by executing command retry. [0003] (1) An error caused by a temporary change in the internal state of the hardware due to the α line, etc. [0004] Failure of the hardware itself is not the cause, so the chances of retrying the command with the same error are very low. Therefore, with command retries, it is possible to recover from these kinds of errors more or less reliably. [0005] (2) Errors due to noise from adj...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/14
CPCH05K999/99G06F11/1405G06F11/16G06F9/30
Inventor 五明则人砂山竜一
Owner FUJITSU LTD