Instruction level production line control method and system thereof in processor
A control method and technology for a control system, which are applied in the field of instruction-level pipeline control in a processor and its systems, can solve the problems of inconsistent instruction execution time, long instruction time, and short instruction time, and achieve simple control and low hardware overhead. , the effect of simple operation method
Active Publication Date: 2013-07-31
INST OF COMPUTING TECH CHINESE ACAD OF SCI
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Problems solved by technology
[0008] In the existing technology, the execution time of each instruction is not exactly the same, some instructions take a long time, and some instructions take a short time
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[0058] The method of the present invention will be further described below in conjunction with the accompanying drawings.
[0059] The instruction level pipeline control method in the processor of the present invention is as follows: Figure 6 shown.
[0060] Step S100, initialize the launch sequence number register and the write-back sequence number register to the same initial value.
[0061] Step S200, when issuing instructions within one clock cycle, for each instruction, the value of the emission sequence number register is used as the base value, according to the order of the instructions in this emission, the emission sequence number of the instruction is generated, and the instruction carrying the launch sequence number.
[0062] On the instruction-level pipeline of the prior art, when the source operands of an instruction are all ready and the functional unit is free, the current instruction can be issued. In the present invention, this instruction carries the laun...
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The invention relates to instruction level production line control method and system thereof in a processor. The method comprises the following steps of: 1. initializing an emitting serial number register and a write-back serial number register to have same initial values; 2. while emitting an instruction, generating an emitting serial number of the instruction by adopting the value of the emitting serial number register as a base value in the sequence of the instruction in the emission and carrying the emitting serial number in the instruction; 3. after instruction emission is finished, updating the value of the emitting serial number register; 4. when the instruction enters a functional part to be executed, maintaining the emitting serial number of the instruction unchangeable; 5. whilewriting the instruction back, sequentially generating a write-back serial number by adopting a value of the write-back serial number register as a base value according to the quantity of instructionsallowed to be written back to the register and writing a result of the instruction with same emitting serial number and write-back serial number back to the register in the ascending sequence of the write-back serial number; and 6. after the instruction is written back, updating the value of the write-back serial number register. The invention can reduce consumption on hardware resources.
Description
technical field [0001] The invention relates to the mechanism of orderly sending and writing back of instructions of a processor, and relates to a solution to the order correlation based on order sending numbers. Background technique [0002] In modern processor design, the performance improvement of the processor is mainly realized by increasing the main frequency of the processor. However, as the number of transistors integrated on a chip increases, power consumption and heat dissipation issues become more serious. The method of simply increasing the main frequency has been difficult to adapt to the development of current processors. In this case, a simple and effective processor pipeline control method is needed to improve the execution efficiency of instructions. In other words, less hardware resources are used to implement pipeline control of instructions, thereby achieving higher instruction throughput. [0003] Pipeline technology refers to dividing the execution o...
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IPC IPC(8): G06F9/38
Inventor 余磊张浩刘志勇范东睿
Owner INST OF COMPUTING TECH CHINESE ACAD OF SCI