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Memory address mapping method and memory address mapping circuit thereof

A technology of memory address and mapping method, applied in TV, electrical components, color TV, etc., can solve problems such as DRAM efficiency degradation, and achieve the effect of reducing memory bank conflicts and improving efficiency

Active Publication Date: 2011-05-11
XUESHAN TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As mentioned above, bank conflict (or page loss) is a key factor in the degradation of DRAM efficiency

Method used

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  • Memory address mapping method and memory address mapping circuit thereof
  • Memory address mapping method and memory address mapping circuit thereof
  • Memory address mapping method and memory address mapping circuit thereof

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Embodiment Construction

[0025] Certain terms are used throughout the specification and claims to refer to particular elements. Those skilled in the art should understand that hardware manufacturers may use different terms to refer to the same element. The specification and claims do not use the difference in name as a way to distinguish components, but use the difference in function of components as a criterion for distinguishing. "Includes" mentioned throughout the specification and claims is an open-ended term, so it should be interpreted as "including but not limited to". In addition, the term "coupled" herein includes any direct and indirect means of electrical connection. Therefore, if it is described that the first device is coupled to the second device, it means that the first device may be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means.

[0026] For image processing applications using ...

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Abstract

A memory address mapping method of controlling storage of images in a memory device is provided. The memory device includes banks each having a plurality of pages. The memory address mapping method includes: receiving a first image; and referring to an image partition setting to generate a first memory address for each horizontal line partition in the first image, wherein the image partition setting defines that one image is divided into horizontal line groups each having at least one horizontal line, and each of the horizontal line groups is divided into horizontal line partitions in a horizontal line direction. First memory address of the horizontal line partitions in each horizontal line group of the first image control that a corresponding horizontal line group having the horizontal line partitions included therein is not stored into a same bank of the memory device.

Description

technical field [0001] The present invention relates to a memory address mapping method and a memory address mapping circuit for storing data in a memory device, in particular to a memory address mapping method that uses a bank interleaving technique (bank interleaving technique) to control the storage of images in a memory device And memory address mapping circuit. Background technique [0002] Dynamic random access memory (Dynamic random access memory, hereinafter referred to as DRAM) is a random access memory that stores each data bit in a capacitor serving as a memory cell. figure 1 A conventional architectural diagram of a DRAM device 100 is shown. The DRAM device 100 includes a plurality of row decoders (row decoders) 1021 to 102_N, a plurality of column decoders (column decoders) 104_1 to 104_N, a plurality of memory banks 106_1 to 106_N, and a plurality of sense amplifiers (sense amplifiers) 108_1 to 108_N . Each memory bank 106_1 to 106_N is accessed through a de...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N7/26H04N5/92
CPCH04N7/012H04N19/423
Inventor 林晏生
Owner XUESHAN TECH INC