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Semiconductor device wafer,semiconductor device, design system, manufacturing method and design method

A technology of manufacturing method and design method, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., and can solve problems such as difficulties in manufacturing thin films and difficult film-forming environments

Inactive Publication Date: 2011-08-31
SUMITOMO CHEM CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, it is difficult to uniform the film-forming environment
Especially in the selective growth of selectively forming a semiconductor on a part of the substrate, it is more difficult to produce a uniform thin film due to the influence of the growth rate of the thin film, the size and shape of the thin film, etc.

Method used

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  • Semiconductor device wafer,semiconductor device, design system, manufacturing method and design method
  • Semiconductor device wafer,semiconductor device, design system, manufacturing method and design method
  • Semiconductor device wafer,semiconductor device, design system, manufacturing method and design method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0125] Use the Substrate Design System 600 to Figure 5 The fabrication method shown produces a figure 2 A semiconductor device substrate 100 and a semiconductor device 460 are shown. As the semiconductor device substrate 100, an SOI substrate, Si x Ge 1-x A substrate for a semiconductor device in which a seed layer of (x=0 to 0.1) and a GaAs layer in contact with the seed layer are sequentially arranged in a direction perpendicular to the main surface of the SOI substrate. Meanwhile, as the semiconductor device 460 , an HBT using the GaAs layer of the semiconductor device substrate 100 as an active layer was designed. As the above-mentioned HBT, an HBT using GaAs as a base and a collector and using InGaP as an emitter is designed.

[0126] Before designing, the second storage unit 632 of the substrate design system 600 has input Figure 7 and Figure 8 Find the interrelationship. As the required specification of the semiconductor device, the Si in contact with the bas...

Embodiment 2

[0133] In Example 2, the case where the growth rate of the thin film for devices is changed by changing the width of the barrier portion is described based on the experimental data of the present inventors. The growth rate of the thin film for devices affects the properties of the thin film for devices such as flatness and crystallinity. Furthermore, the properties of the device thin film greatly affect the performance of semiconductor devices formed from the device thin film. Therefore, it is necessary to properly control the growth rate of the device thin film so that the required characteristics of the device thin film derived from the required specifications of the semiconductor device are satisfied. The experimental data described below shows how the growth rate of the thin film for devices varies depending on the width of the barrier portion and the like. By using the experimental data, the shape of the barrier portion can be designed so that the growth rate of the devi...

Embodiment 3

[0147] Figure 20 A plan view of a heterojunction bipolar transistor (HBT) 3100 produced by the present inventors is shown. HBT3100 has a structure in which 20 HBT elements 3150 are connected in parallel. In addition, in Figure 20 A part of the base substrate is shown in , and only one part of HBT3100 is shown. Although test patterns and other semiconductor elements are also formed on the same base substrate, description thereof will be omitted here.

[0148] The respective collectors of the twenty HBT elements 3150 are connected in parallel by collector wiring 3124 , the respective emitters are connected in parallel by emitter wiring 3126 , and the respective bases are connected in parallel by base wiring 3128 . In addition, the 20 bases are divided into four groups, and the five bases of each group are connected in parallel. Collector wiring 3124 is connected to collector pad 3130 , emitter wiring 3126 is connected to emitter pad 3132 , and base wiring 3128 is connected...

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Abstract

A semiconductor device wafer comprising a device thin film for forming a semiconductor device, an inhibition part which surrounds the device thin film and inhibits crystal growth of a precursor of the device thin film, a sacrificial growth part formed by sacrificially growing the precursor into a crystal in such a manner that the sacrificial growth part is arranged in the periphery of the device thin film with the inhibition part lying therebetween, and a protective film which covers the upper part of the sacrificial growth part, while exposing the upper part of the device thin film. The protective film may be composed of a polyimide.

Description

【Technical field】 [0001] The present invention relates to a substrate for a semiconductor device (Semiconductor Device Wafer), a semiconductor device device, a design system, a manufacturing method, and a design method. 【Background technique】 [0002] In recent years, semiconductor devices using Group 3-5 compound semiconductors such as GaAs in the active region have been developed. For example, Patent Document 1 discloses a substrate for a semiconductor device in which a GaAs substrate, an AlGaAs buffer layer, a GaAs channel layer, and a GaAs contact layer are sequentially arranged. In Patent Document 1, a crystalline thin film of a compound semiconductor is formed by a vapor phase epitaxial growth method (sometimes referred to as a VPE method). [0003] 【Patent Literature】 [0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 11-345812 [0005] When using a crystalline thin film as an active region of a semiconductor device, it is desirable that the fil...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/20H01L21/02H01L21/76H01L21/82H01L21/822H01L27/04H01L27/12
CPCH01L21/02642H01L21/02439H01L29/66742H01L21/02636H01L21/0237H01L21/20
Inventor 高田朋幸秦雅彦山中贞则
Owner SUMITOMO CHEM CO LTD