Embedded die with protective interposer
A bare chip and intermediary technology, applied in the field of embedded bare chips, can solve problems such as damage to dielectric materials, low yield/reliability of bare chips, and defects in yield/reliability
Active Publication Date: 2014-07-23
MARVELL ASIA PTE LTD
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- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
However, dies may include dielectric materials such as low-k dielectrics that are susceptible to cracks, delamination, or other yield / reliability defects caused by stress or other mechanical forces
Therefore, stress or other mechanical forces associated with the embedding of the die within the substrate may damage the dielectric material, resulting in lower yield / reliability of the die
Method used
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Embodiment Construction
[0014] Embodiments of the present disclosure describe techniques, structures, and configurations for dies and interposers embedded in substrates. In the following detailed description, reference is made to the accompanying drawings which form a part hereof, and like numerals refer to like parts throughout. Other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Accordingly, the following detailed description is not to be taken in a limiting sense, and the scope of the embodiments is defined by the appended claims and their equivalents.
[0015] Descriptions may use perspective based descriptions such as top / bottom, above / below and / or top / bottom. Such description is provided merely to facilitate discussion and is not intended to constrain the application of the embodiments described herein to any particular orientation.
[0016] For the purposes of this disclosure, the expression "A / B" means e...
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The present disclosure relates to embedded die with a protective interposer, and embodiments of the present disclosure provide a substrate having (i) a first stack, (ii) a second stack, and (iii) disposed on a core material between the first stack and the second stack; and a die attached to the first stack, the die having an interposer bonded to a surface on the active side of the die, the surface comprising (i) a dielectric material and (ii) a bonding pad for routing electrical signals of the die, the interposer has a via formed therein electrically coupled to the bonding pad for further routing of electrical signals for the die signal, where the die and interposer are embedded in the core material of the substrate. Other implementations may be described and / or claimed.
Description
[0001] Cross References to Related Applications [0002] This disclosure claims priority to U.S. Provisional Patent Application Serial No. 61 / 315,319, filed March 18, 2010, which is for all purposes in its entirety except for any sections that may be inconsistent with this specification Incorporated into this article. technical field [0003] Embodiments of the present disclosure relate to the field of integrated circuits, and more particularly to techniques, structures and configurations of embedded die with protective interposers. Background technique [0004] The background description provided herein is for the purpose of generally presenting the context of the disclosure. Neither the work of the presently named inventors, to the extent described in this Background section, nor described as prior art at the time of filing, is admitted, either expressly or by implication, to be prior art to the present disclosure. [0005] Integrated circuit devices, such as transistor...
Claims
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IPC IPC(8): H01L21/48H01L21/60H01L23/492
CPCH01L2224/04105H01L24/29H01L23/3121H01L2224/32225H01L25/0657H01L2224/73253H01L2224/16225H01L2224/0401H01L2924/078H01L2924/01006H01L2924/19041H01L23/5389H01L24/16H01L2924/01079H01L2924/14H01L2924/15311H01L2224/73267H01L2924/10253H01L24/13H01L2924/01005H01L24/82H01L2924/01013H01L2924/15331H01L2224/73259H01L2924/014H01L2924/01023H01L2225/06541H01L2924/01029H01L2224/24226H01L2224/16145H01L2225/06513H01L24/32H01L2924/01019H01L2225/06572H01L2924/01033H01L2924/3512H01L2924/00
Inventor 吴亚伯吴嘉洛
Owner MARVELL ASIA PTE LTD