Frequency correction device and method for frequency synthesizer

Abstract

The present invention relates to an apparatus for frequency calibration in a frequency synthesizer and a control method thereof. A phase locked loop of the existing automatic frequency calibration apparatus uses a loop switch for selecting a Vref voltage to be an input in an open loop status, but problems caused by phase noise exsit. The up / down processor is utilized for outputting one of a GND voltage and a VDD voltage to a voltage-controlled oscillator via a loop filter in an open loop status, or outputting one of a step-up voltage and a step-down voltage in accordance with a phase difference to the voltage-controlled oscillator via the loop filter in a close loop status. When the up / down processor outputs one of the GND voltage and the VDD voltage in the open loop status, a memory bank selector compares frequencies for selecting a value of a memory bank and then adds an offset to the value of the memory bank so as to determine a final value of a VCO memory bank in the phase locked loop.

Description

technical field [0001] The invention relates to a frequency synthesizer with oscillator frequency correction function and its control method, in particular to a method for removing the loop switch used to select Vref as an input during open-loop control, and to enable the charge pump during open-loop control Directly output GND or VDD to reduce phase noise. When the memory bank corresponding to the set frequency is selected, the offset value of the memory bank is compensated according to the GND or VDD mode, and it becomes the frequency correction device of the frequency synthesizer of the phase-locked loop. and its control methods. Background technique [0002] In general, a phase-locked loop (PLL: Phase Locked Loop) compares the phase of the input frequency signal with the phase of the frequency signal being fed back, and then controls the frequency locking by performing step-up / step-down charging. [0003] figure 1 It is a frequency locking control circuit diagram of a...

AI Technical Summary

Problems solved by technology

However, the existing PLL circuit has a loop switch, and the voltage control value is input to the voltage control oscillator through the loop switch, so there is a disadvantage that phase noise occurs due to the loop switch using CMOS switches.

In addition, there is another disadvantage that the open loop requires a circuit that can generate Vref voltage

Images