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Method for managing chip verification test cases

A test case, verification test technology, applied in software testing/debugging, electrical digital data processing, special data processing applications, etc., can solve problems such as large labor costs, and achieve the effect of reducing labor costs, ensuring completeness, and improving efficiency

Active Publication Date: 2012-01-25
FENGHUO COMM SCI & TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0006] The technical problem to be solved by the present invention is to solve the problem that in the verification process of the chip, the manpower cost of entering and verifying the test case is too large, and there are too many uncertain factors

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  • Method for managing chip verification test cases
  • Method for managing chip verification test cases
  • Method for managing chip verification test cases

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Embodiment Construction

[0031] The present invention provides a management method of chip verification test cases, which can automatically complete the input of test cases and the reverse mark output of verification results, reduce the time for testers to check test cases during the test process, and greatly improve the efficiency of chip verification , and avoid the situation that is prone to omissions when manually constructing use cases, effectively ensuring the completeness of chip verification.

[0032] The chip verification test case management method provided by the present invention includes two steps of test case import and back-label output. The present invention will be described in detail below in conjunction with the accompanying drawings.

[0033] Import and export systems such as figure 1 As shown, it includes a Dom (Document Object Model) analysis tool, a component that interacts with the bottom layer of the test system platform, and a GUI graphical interface. The Dom analysis tool r...

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Abstract

The invention discloses a method for managing chip verification test cases. The method comprises the following steps of: directly reading a test case list completed in a project planning stage, generating tree structure data by using a DOM (Document Object Model) analysis method, and directly generating the test cases by leading each test case in a test case list document in a testing platform; and directly back-marking a test result in the test case lift after testing. According to the method for managing the chip verification test cases in the invention, the chip verification working efficiency is greatly increased; the manpower cost is reduced; the verification working completeness can be effectively ensured; and the chip verification quality is improved.

Description

technical field [0001] The invention relates to the field of chip verification, in particular to a management method of chip verification test cases. Background technique [0002] According to Moore's Law, with the development of digital integrated circuits (chips), their complexity increases day by day. Whether it is in the fields of communication, consumer electronics or industrial applications, the process of digital integrated circuits is improving faster and faster, and the functions of a single chip are increasing, and the design of integrated circuit chips is bound to become more and more complicated. Therefore, for each integrated chip verification team, the work undertaken will become more and more complicated. In order to meet the exponential growth of chip function requirements, how to improve the efficiency of EDA verification work, how to ensure the success rate of chips, and how to enhance the integrity of verification work have become very urgent needs. [0...

Claims

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Application Information

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IPC IPC(8): G06F11/36G06F17/50
Inventor 柏帆袁博浒
Owner FENGHUO COMM SCI & TECH CO LTD
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