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Method for producing copper filled silicon through hole

A manufacturing method and technology of through-silicon vias, which are applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems affecting device reliability and achieve the effects of improving reliability, saving costs, and eliminating pores

Active Publication Date: 2013-07-10
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The electroplating of copper is carried out simultaneously on the surface of the wafer, the side wall and the bottom of the through-silicon via, often forming pores in it, which affects the reliability of the device

Method used

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  • Method for producing copper filled silicon through hole
  • Method for producing copper filled silicon through hole
  • Method for producing copper filled silicon through hole

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Embodiment Construction

[0025] The present invention will be described in further detail below in conjunction with accompanying drawing:

[0026] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar extensions without violating the connotation of the present invention, so the present invention is not limited by the specific implementations disclosed below.

[0027] Secondly, the present invention is described in detail using schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic diagram is only an example, and it should not be limited here. The protection scope of ...

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Abstract

The invention relates to a method for producing a copper filled silicon through hole, comprising the steps of: forming a silicon through hole in the surface of a silicon chip; depositing an insulation layer on the surface of the structure; further depositing one or more barrier layers on the surface of the structure, and simultaneously removing the barrier layers and the insulation layer at the bottom of the silicon through hole by adopting a punchthrough etching technology; immersing the silicon chip into a diluted hydrofluoric acid solution containing copper ions for 5-600 seconds to form acopper seed layer at the bottom of the silicon through hole; filling copper on the copper seed layer by adopting a chemical copper plating technology; removing the copper, the barrier layers and the insulation layer on the upper surface of the chip; and grinding the lower surface of the chip to thin until reaching the bottom of the silicon through hole, and removing the seed layer of the copper. According to the method for producing the copper filled silicon through hole provided by the invention, the seed layer at the bottom of the silicon through hole is adopted, and the filling of copper is completed by chemical copper plating, therefore, gaps in the silicon through hole are eliminated, the reliability is enhanced, and meanwhile, the cost is saved.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for manufacturing through-silicon holes filled with copper. Background technique [0002] As the integration level of integrated circuits continues to increase, semiconductor technology continues to develop rapidly. The existing integration improvement is mainly to reduce the minimum feature size, for example: the minimum feature size is 90 nm, the minimum feature size is 45 nm, the minimum feature size is 32 nm, and the minimum feature size is 22 nm, so that at a given Areas can integrate more components. However, the reduction of the minimum feature size mentioned above is basically two-dimensional (2D) integration in essence. Specifically, the integrated components are all located on the surface of the semiconductor wafer (wafer). After the 22nm technology platform, system complexity and equipment investment costs have risen sharply. Therefore, using modern electronic...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768
Inventor 周军
Owner SHANGHAI HUALI MICROELECTRONICS CORP