Driving circuit of light-emitting diode, decoding circuit and decoding method
A technology of light emitting diodes and decoding circuits, applied in the field of decoding circuits, can solve the problems of complex design and high cost, and achieve the effect of overcoming frequency drift
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no. 1 example
[0040] figure 1 It is a schematic diagram of a frequency estimation manner of a clock pulse signal according to the first embodiment of the present invention. The data format of DMX512 signal includes interrupt "BREAK", time after interruption "Mark time after BREAK, MAB", start code (located in the first time slot slot 0), channel data (located in the second time slot slot 1 to In the 513th time slot slot 512, the second time slot slot 1 to the 513th time slot slot 512 is located after the first time slot slot 0, figure 1 Not shown), time between channels 11 (Mark time between slots) and time before break "Mark time before BREAK, MBB". BREAK is the beginning of the DMX512 data packet, which is a low-level output of 88 microseconds; MAB is located after BREAK, which is a high-level output of 8 microseconds or two 4 microsecond pulses. The start code (SC for short) is the data at the beginning of the data flow, which has the same format as the channel data, and usually includ...
no. 2 example
[0052] From another point of view, the above figure 1 , figure 2 The embodiment can be summarized as a decoding method, please refer to image 3 , image 3 It is a flowchart of a decoding method according to the second embodiment of the present invention. The decoding method is suitable for decoding a data signal corresponding to the DMX512 protocol. The decoding method includes the following steps: first, receiving a clock pulse signal and a data signal, the data signal includes a plurality of time slots, and each of the time slots has a time slot period ,like figure 1 shown (step S310). Then, one of the plurality of time slots is sampled according to the clock signal to generate a number of samples corresponding to the time slot period (step S320). Next, a reference signal corresponding to the frequency of the clock signal is output according to the number of samples (step S330). Then, the data signal is sampled according to the clock signal and the reference signal t...
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