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Extended single-bit error correction and multi-bit error detection

An error correction and error detection technology, applied in the direction of error detection/correction, redundant code error detection, data representation error detection/correction, etc.

Active Publication Date: 2016-01-20
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, even when error detection and correction components are included, some conventional systems may improperly detect or incorrectly correct some errors, resulting in potential system misoperation

Method used

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  • Extended single-bit error correction and multi-bit error detection
  • Extended single-bit error correction and multi-bit error detection
  • Extended single-bit error correction and multi-bit error detection

Examples

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Embodiment Construction

[0021] figure 1 A block diagram of a system 100 with a control module 111 according to an embodiment of the invention is shown. System 100 may comprise or be included in an electronic product, such as a computer, television, cellular phone, or other electronic product. System 100 includes memory controller 110 to facilitate transferring data (DATA) and other information on lines 112 and 114 between processor 120 and memory device 140 . The data information includes data bits.

[0022] System 100 uses control module 111 to generate error correction information (EC) associated with data information as it is stored in memory device 140 in a write operation of system 100 . System 100 also uses control module 111 to generate other error correction information associated with data information when it is retrieved from memory device 140 in a read operation of system 100 . The control module 111 compares both error correction information generated during write and read operations ...

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PUM

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Abstract

Some embodiments include a method for when a multi-bit error includes a plurality of erroneous data bits belonging to only one specific group of the plurality of groups of data bits and none of the other groups of the plurality of groups have Apparatus and method for preventing misidentification of said multi-bit error and ignoring at least one case of said multi-bit error in case of error.

Description

[0001] Related Application Cross Reference [0002] This patent application claims the benefit of priority to US Application Serial No. 12 / 417,390, filed April 2, 2009, which is incorporated herein by reference. technical field Background technique [0003] Data and other information used in computer systems and various electronic devices typically consists of many pieces of information called bits. Each bit has a value such as binary 0 or binary 1. In some cases, factors such as physical defects, cosmic rays, and improper use can alter the value of a single bit or the value of multiple bits of data information stored in these systems or devices. Therefore, erroneous data information may appear in some situations. Many conventional systems or devices may include error detection and correction components to detect and correct certain errors in data information. For example, some systems have components to correct single erroneous bits of data information. However, even w...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/10G06F13/16G06F12/00
CPCG06F11/1008H03M13/05H03M13/19
Inventor 戴维·R·雷斯尼克
Owner MICRON TECH INC
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