Semiconductor device
A technology of semiconductors and devices, which is applied in the field of semiconductor devices, can solve the problems such as the reduction of gate electrode distance and the increase of gate electrode parasitic capacitance, and achieve the effect of suppressing the increase of gate resistance and the increase of suppression
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no. 1 example
[0042] figure 1 is a plan view showing the configuration of the semiconductor device according to the first embodiment. figure 2 is showing figure 1 A plan view of the layout of the second conductivity type impurity layer 120 and the peripheral impurity layer 122 of the semiconductor device shown in . image 3 is shown in the figure 1 and figure 2 An enlarged plan view of the layout of the buried gate electrode 140 in the region α shown by the dashed line in . Figure 4 is along image 3 The cross-sectional view of A-A′ in.
[0043] The semiconductor device according to this embodiment has a semiconductor substrate 100, a semiconductor layer 110, a second conductivity type impurity layer 120, a first conductivity type impurity layer 150, a gate contact region 102, an upper gate electrode 160, a plurality of buried gate electrodes 140 , bury the connection electrodes 141 , 143 and the source contact 220 . Such as Figure 4 As shown in , the semiconductor layer 110 is ...
no. 2 example
[0057] Figure 9 is an enlarged plan view showing the configuration of the semiconductor device according to the second embodiment, which corresponds to that of the first embodiment image 3 . Figure 10 is along Figure 9 The cross-sectional view of A-A′ in. The semiconductor device according to the present embodiment has the same configuration as the semiconductor device according to the first embodiment except for points to be described below.
[0058] First, buried gate electrode 144 adjacent to buried gate electrode 142 has the same length as buried gate electrode 142 and has the same end position as that of buried gate electrode 142 in the vertical direction in the drawing. Then, the end portion of the buried gate electrode 144 is connected through the buried connection electrode 141 .
[0059] In addition, in the source contact 220 , the source contact 222 extending between the buried gate electrode 144 and the buried gate electrode 145 adjacent thereto is also buri...
no. 3 example
[0062] Figure 11 is a plan view of the semiconductor device according to the third embodiment, which corresponds to that of the first embodiment figure 1 . The semiconductor device according to the present embodiment has the same configuration as that of the first or second embodiment except that the gate contact region 102 is located at the corner of the semiconductor device. Figure 11 The same situation as the first embodiment is shown. Also in this embodiment, the same effects as those of the first or second embodiment can be obtained. In addition, when packaged into the final product, it is also possible to shorten the wiring length required for the connection from the lead frame (located above the chip in the figure) to the gate pad.
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