MOS transistor and formation method thereof

Abstract

The invention provides an MOS transistor and a formation method thereof. The method comprises the following steps: providing a semiconductor substrate; patterning the semiconductor substrate to form a groove; forming a spacer on a sidewall of the groove; oxidizing a bottom of the groove, and forming an oxide layer at the bottom of the groove; removing the spacer, forming semiconductor material in the groove, and covering the oxide layer, wherein, a surface of the semiconductor material is level with a surface of the semiconductor substrate; forming a gate structure at the surface of the semiconductor material, wherein, the gate structure comprises a gate which is on a gate dielectric layer between the gate and the surface of the semiconductor material. According to the MOS transistor and the formation method of the invention, generation of leakage current can be prevented, or at least the leakage current can be reduced. And, technology of forming the oxide layer is simple, and control is easy.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to forming a MOS transistor and a method thereof. Background technique [0002] The MOS transistor includes: a gate, a gate dielectric layer between the gate and the substrate, a source region and a drain region, and the source region and the drain region are prone to leakage current. The existence of the leakage current will affect the performance of the final semiconductor device. [0003] US Patent Publication No. "US7572712B2" discloses a method of forming an NMOS transistor. Figure 1a ~ Figure 1e It is a schematic cross-sectional structure diagram of a method for forming a MOS transistor in the prior art. [0004] refer to Figure 1a , providing a semiconductor substrate 10, forming a silicon oxide layer 11 and a silicon nitride layer 12 on the conductive substrate 10, the silicon oxide layer 11 is located on the semiconductor substrate 10, and the silicon nitride lay...

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Problems solved by technology

[0011] The problem solved by the present invention is that the method for forming MOS transistors in the prior art tends to generate gaps when forming the isolation structure under the channel; and the process of forming the isolation structure under the channel is complicated

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