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Power semiconductor device and manufacturing method thereof

A technology of power semiconductors and manufacturing methods, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve poor thermal stability and reliability, cannot effectively block movable impurity ions, and is not suitable for high temperatures , moisture and high power issues

Active Publication Date: 2015-11-25
BYD SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] Most PowerMOSFET and IGBT power devices use single-layer phosphosilicate glass (PSG), but phosphosilicate glass (PSG) is easy to absorb water, so single-layer phosphosilicate glass (PSG) cannot effectively block water vapor and Na+, K+, etc. Move impurity ions, and have poor thermal stability and reliability, and are not suitable for working environments such as high temperature, humidity and high power

Method used

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  • Power semiconductor device and manufacturing method thereof
  • Power semiconductor device and manufacturing method thereof
  • Power semiconductor device and manufacturing method thereof

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Embodiment Construction

[0022] Specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be understood that the specific embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention.

[0023] like figure 2 As shown, the power semiconductor device according to the present invention includes: a main body 100 that determines the type of the device, and the main body 100 is mainly used as a conductive part of the device to form a conductive channel for the device. For typical power metal oxide semiconductor field effect transistors (ie, PowerMOSFET power devices) and insulated gate bipolar transistors (ie, IGBT power devices), the main body 100 can also be classified into NPN type or PNP type. Taking a vertically conductive NPN type PowerMOSFET power device as an example, the main body 100 includes a substrate 3, an implantation region 4 and a d...

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Abstract

The invention discloses a power semiconductor device. The device comprises a main body, an oxide layer, a grid, and an isolated layer. The main body includes: a substrate; an injection region, which is formed on a portion of the substrate; a diffusion region, which is formed on a portion of the substrate; and a source region, which is embedded into portions of upper surfaces of the injection region and the diffusion region; besides, the substrate and the source region have same conductivity and the injection region and the diffusion region has conductivity that is opposite to that of the substrate and the source region. The oxide layer is formed on the main body and is transversely extended to areas of the injection region and the diffusion region. The grid is arranged on the oxide layer. And the isolated layer is formed on the grid and at side surfaces of the grid; and an enclosed space is formed by the isolated layer and the oxide layer, so that the grid is isolated from the main body. In addition, the isolated layer at least comprises two layers and all the layers are formed by different materials; one layer of the isolated layer is used for offsetting stresses generated by another layer of the isolated layer and another layer of the isolated layer has a blocking function. According to the power semiconductor device provided in the invention, steam and movable foreign ions like Na+ and K+ and the like can be effectively blocked; and moreover, the device has good heat stability and reliability as well as are suitable for working environments like a high temperature environment, a moisture environment and a larger power environment and the like.

Description

technical field [0001] The present invention relates to semiconductor devices in the technical field of microelectronics, in particular to a power semiconductor device and a manufacturing method thereof. Background technique [0002] like figure 1 As shown, the existing power metal-oxide-semiconductor field-effect transistor (i.e. PowerMOSFET power semiconductor device), insulated gate bipolar transistor (i.e. IGBT power semiconductor device) mainly includes a substrate 3, an implant formed on a part of the substrate 3 region 4, diffusion region 5, and source region 6 embedded in part of the upper surface of implantation region 4 and diffusion region 5. Substrate 3 and source region 6 have the same electrical conductivity, and implantation region 4 and diffusion region 5 It has the opposite conductivity; the oxide layer 7 formed on the body 100 extends laterally to the region of the implantation region 4 and the diffusion region 5; the gate 8 disposed on the oxide layer 7; ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/28H01L23/29H01L29/78H01L29/739H01L21/56
CPCH01L2924/0002
Inventor 乐双申张静詹璧瑕
Owner BYD SEMICON CO LTD