Semiconductor device and manufacturing method for gallium nitride epitaxial layer of semiconductor device
A manufacturing method and epitaxial layer technology, applied in semiconductor devices, electrical components, circuits, etc., can solve problems such as large lattice mismatch and thermal mismatch, high dislocation density, and difficult
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Embodiment 1
[0037] Such as figure 1 As shown, the GaN epitaxial layer manufacturing method provided in the embodiment of the present invention includes the following steps:
[0038] Step S101 : providing a base, the base includes a silicon substrate 1 with a (100) crystal plane and an etch stop layer 2 on the surface of the silicon substrate.
[0039] In the embodiment of the present invention, processes such as thermal oxidation or deposition can be used to form the etching stopper layer 2 on the surface of the silicon substrate 1 of the (100) system crystal plane. Usually, the temperature of thermal oxidation is between 750°C and 1100°C. During this period, the thermally grown etch barrier layer 2 can be tightly attached to the silicon substrate and has excellent dielectric properties. In the embodiment of the present invention, the material of the etching barrier layer 2 is SiO 2 ,Such as figure 2 as shown, figure 2 A schematic diagram of the structure after forming an etching barr...
Embodiment 2
[0062] The method provided by the present invention is described below with a specific embodiment.
[0063] Step 201: Provide a base, apply PECVD on the surface of Si substrate 1 with (100) crystal plane to form continuous SiO at 350 degrees 2 Etch stop layer 2, such as figure 2 As shown, the SiO 2 The thickness of the etch barrier layer 2 is 200nm.
[0064] Step 202: Etching on the SiO by photolithography and BOE 2 A strip-shaped groove pattern window 3 whose edge is parallel to the crystal direction on the Si substrate is formed in the etch barrier layer 2, wherein the width a of the groove pattern window 3 is 1200 nm, and adjacent groove patterns The distance b between the windows is 10 μm.
[0065] Step 203: SiO with groove pattern window 3 2 The etch barrier layer 2 is used as a mask, and the Si substrate in the groove pattern window 3 is etched with KOH etching solution at 115 degrees to form a groove 4 with a (111) crystal plane in the Si substrate , exposing th...
Embodiment 3
[0076] The method provided by the present invention can be widely applied to the epitaxial growth and fabrication of gallium nitride (GaN) semiconductor devices, including gallium nitride light-emitting diodes (GaN LEDs) and gallium nitride (GaN) semiconductor electrical devices, that is, in the embodiments of the present invention High-quality semiconductor device structures such as GaN LEDs, lasers, detectors, and power diodes can also be grown continuously on the high-temperature GaN layer. Therefore, an embodiment of the present invention also provides a semiconductor device, which includes:
[0077] (100) silicon substrate of crystal plane;
[0078] an etch barrier layer on the surface of the silicon substrate, the surface of the etch barrier layer has a groove pattern window, and the edge of the groove pattern window is parallel to the system crystal direction of the silicon substrate;
[0079] There is a groove in the surface of the silicon substrate not covered by th...
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Abstract
Description
Claims
Application Information
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