Non-volatile memory compatible with complementary metal oxide semiconductor (CMOS) logical process and preparation method for non-volatile memory

Abstract

The invention relates to a non-volatile memory compatible with a complementary metal oxide semiconductor (CMOS) logical process and a preparation method for the non-volatile memory. The non-volatile memory comprises a semiconductor substrate, wherein a plurality of memory cells are arranged on the internal upper part of the semiconductor substrate; each memory cell comprises an access transistor, an N-channel metal oxide semiconductor (NMOS) programming transistor and an NMOS control capacitor; the access transistor, the NMOS programming transistor and the NMOS control capacitor are isolated from one another through field medium areas in the semiconductor substrate; the memory cells are isolated from the semiconductor substrate through a second N-type area in the semiconductor substrate and a third N-type area above the second N-type area; a gate medium layer is deposited on the surface of the semiconductor substrate; a floating gate electrode is arranged on the gate medium layer, and covers and penetrates through the corresponding gate medium layer above the access transistor, the NMOS programming transistor and the NMOS control capacitor; and side protection layers are deposited on two sides of the floating gate electrode and cover the sidewalls of the floating gate electrode. The non-volatile memory is compact in structure, compatible with the CMOS process, safe and reliable, and the cost of a chip is reduced.

Description

technical field [0001] The invention relates to a non-volatile memory and a preparation method thereof, in particular to a non-volatile memory compatible with a CMOS logic process and a preparation method thereof, belonging to the technical field of integrated circuits. Background technique [0002] For system-on-chip (SoC) applications, it is the integration of many functional blocks into an integrated circuit. The most common SoCs include a microprocessor or microcontroller, static random access memory (SRAM) modules, non-volatile memory, and logic blocks for various special functions. However, conventional non-volatile memory processes, which typically use stacked-gate or split-gate memory cells, are not compatible with conventional logic processes. [0003] Non-volatile memory (NVM) technology is different from traditional logic technology. The combination of non-volatile memory (NVM) technology and traditional logic technology will make the process a more complex and ...

AI Technical Summary

Problems solved by technology

The combination of non-volatile memory (NVM) technology and traditional logic technology will make the process a more complex and expensive combination; since the typical usage of NVM for SoC applications is in relation to the overall The chip size is small, so this practice is not advisable

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