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Semiconductor device and method of manufacturing the same

A technology for semiconductors and devices, applied in the field of manufacturing semiconductor devices, capable of solving problems such as changes in device operations

Active Publication Date: 2012-07-18
KIOXIA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0009] However, if the control layer is formed with an excessive thickness, high resistance is generated in the source / drain, which not only cancels the improvement of device characteristics by strain application, but also causes many negative factors such as device change between operations

Method used

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  • Semiconductor device and method of manufacturing the same
  • Semiconductor device and method of manufacturing the same
  • Semiconductor device and method of manufacturing the same

Examples

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no. 1 example

[0041] now refer to Figure 4A-5 , to illustrate the semiconductor device according to the first embodiment. The semiconductor device of the first embodiment is a MOSFET. Figure 4A A cross section in the gate length direction (Lg direction) of the channel region of the MOSFET is shown in . Figure 5 A cross section in the gate width direction (Wg direction) of the source region or the drain region of the MOSFET is shown in . Figure 4A is along Figure 5 A cross-sectional view taken along the section line A-A. Figure 5 is along Figure 4A Sectional view taken along section line B-B.

[0042] Such as Figure 4A As shown in , in the semiconductor device of the first embodiment, a buried oxide layer (BOX layer) 2 is formed on a Si substrate 1, and a Si-containing strained semiconductor layer (first semiconductor layer) is formed in a mesa shape on the buried oxide layer 2. )3. The size (diameter) of the planar shape of strained semiconductor layer 3 parallel to the top ...

no. 2 example

[0070] see now Figure 9, illustrating a semiconductor device according to the second embodiment. The semiconductor device of the second embodiment is a MOSFET. Figure 9 is a perspective view of a MOSFET.

[0071] The MOSFET is formed on a Si substrate 1 with a buried oxide layer 2 formed on its top surface. The strained semiconductor layer 3a which will be the channel and source / drain regions and has a silicided surface region is formed in a mesa shape. The size (diameter) of the planar shape of strained semiconductor layer 3 a parallel to the top surface of Si substrate 1 is 1 μm or less. The semiconductor layer 3a includes a long and thin channel and a source / drain region connected to both sides of the channel and having a diameter parallel to the buried oxide layer 2 larger than the planar shape of the channel. The planar shape of the top surface. On the source / drain regions, a strain control layer 8a having a silicided surface region is formed. That is, both the so...

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Abstract

A semiconductor device according to an embodiment includes: a substrate; a first semiconductor layer formed on the substrate and having a strain; a second and a third semiconductor layers formed at a distance from each other on the first semiconductor layer, and having a different lattice constant from a lattice constant of the first semiconductor layer; a gate insulating film formed on a first portion of the first semiconductor layer, the first portion being located between the second semiconductor layer and the third semiconductor layer; and a gate electrode formed on the gate insulating film. At least one of outer surface regions of the second semiconductor layer and a second portion of the first semiconductor layer is a first silicide region, and at least one of outer surface regions of the third semiconductor layer and a third portion of the first semiconductor layer is a second silicide region, the second and third portions being located immediately below the second and third semiconductor layers respectively.

Description

technical field [0001] Embodiments described herein generally relate to semiconductor devices including strained semiconductor layers, and methods of fabricating the semiconductor devices. Background technique [0002] With the development of LSI technology, Si-LSI semiconductor devices, especially Si-MOSFETs, are becoming more and more complex year by year. In recent years, however, a limitation of photolithography has been pointed out from the viewpoint of process technology, while a limitation of carrier mobility has been pointed out from the viewpoint of device physics. Following this trend, it is becoming more difficult to manufacture more complex Si-LSI semiconductor devices. [0003] Recently, a method of applying "strain" to the active layer to form a device has attracted attention as a method of improving electron mobility, which is one of the indicators of performance improvement of Si-MOSFETs. When strain is applied to the active layer, the band structure of the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/02H01L21/70
CPCH01L29/785H01L29/7848H01L29/78654H01L21/28518H01L29/66712
Inventor 臼田宏治手塚勉
Owner KIOXIA CORP