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Semiconductor substrate and method for manufacturing semiconductor substrate

A manufacturing method and semiconductor technology, applied in the field of manufacturing semiconductor substrates and semiconductor substrates, can solve problems such as image recognition becomes difficult, productivity decreases, and costs increase

Inactive Publication Date: 2012-07-18
SUMITOMO CHEM CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this method will cause an increase in the number of processes resulting in a decrease in productivity and high cost
Especially in the recent semiconductor process, many semiconductor chips are automatically and continuously processed according to the production cycle of tens of seconds (the time required for one working time), so the correction value of the measured position for each substrate, And the process of correcting the position of forming a functional part according to this value leads to a significant reduction in productivity and an increase in cost
[0008] At the same time, if the semiconductor crystal is grown on the semiconductor substrate, since the semiconductor crystal also grows in the alignment mark, it becomes difficult to image recognize the boundary line (edge) of the alignment mark.

Method used

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  • Semiconductor substrate and method for manufacturing semiconductor substrate
  • Semiconductor substrate and method for manufacturing semiconductor substrate
  • Semiconductor substrate and method for manufacturing semiconductor substrate

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0077] Figure 7 , is a cross-sectional view of the fabricated semiconductor substrate 700 . Figure 8 , represents the shape of the alignment mark 720 formed on the semiconductor substrate 700 . In the semiconductor substrate 700, in the opening formed in the barrier layer 730 provided on the silicon substrate 710, a GaN buffer layer 750, a GaN crystal 752 and an Al 0.2 Ga 0.8 N Crystalline 754.

[0078] An AlN buffer layer 760 with a thickness of 100 nm was formed on the main surface of the Si substrate having a (111) off-off angle of 0° in a reaction furnace at an internal temperature of 900° C. by MOCVD. Next, the obtained substrate is taken out from the reaction furnace. A photosensitive resin is applied to the upper surface of the AlN buffer layer 760 . A cross-shaped opening exposing the AlN buffer layer 760 is formed by photolithography. The opening, with the Figure 8 As shown, two rectangles with a long side of 30 μm and a short side of 5 μm overlap each other...

Embodiment 2

[0087] Figure 9 , is a cross-sectional view of the manufactured semiconductor substrate 900 . In the semiconductor substrate 900, a GaAs buffer layer 950, an Al 0.2 Ga 0.8 As crystal 952, In 0.15 Ga 0.85 As crystal 954, Al 0.2 Ga 0.8 As crystal 956, n-GaAs crystal 958.

[0088] A photosensitive resin is coated on the main surface of the GaAs substrate 910 with a plane orientation (001) off-off angle of 2°. A cross-shaped opening exposing the GaAs substrate 910 was formed by photolithography. Next, the obtained substrate was moved to a chamber of a reactive ion etching apparatus, and the GaAs substrate 910 exposed at the opening was dry-etched to a depth of 5 μm by using SF6 gas plasma to form alignment marks 920 . Next, the photosensitive resin was dissolved and removed with acetone.

[0089] Silicon oxide was deposited as a barrier layer 930 with a thickness of 50 nm on the entire surface of the substrate including the alignment mark 920 by the CVD method. A barrie...

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Abstract

Disclosed is a method for manufacturing a semiconductor substrate, which is provided with: a step wherein an alignment mark is formed on a base substrate; a step wherein, after the step of forming the alignment mark, an inhibition layer that inhibits crystal growth is formed in a region including the alignment mark on the base substrate; a step wherein, on the basis of information that indicates a position where an opening having the position of the alignment mark as reference is to be formed, the opening that exposes the base substrate is formed in a region wherein the alignment mark is not provided on the inhibition layer; and a step wherein a semiconductor crystal is grown in the opening.

Description

【Technical field】 [0001] The present invention relates to a semiconductor substrate and a method for manufacturing the semiconductor substrate. 【Background technique】 [0002] A technique for selectively growing GaN on an AlN buffer layer formed on a Si substrate is known (for example, see Non-Patent Document 1). Meanwhile, a technique of growing a semiconductor crystal using alignment marks formed on a semiconductor substrate is also known (for example, refer to Patent Document 1). [0003] Non-Patent Document 1 S. Haffouz, et.al., Journal of crystal growth, 311(2009) 2087-2090 [0004] Patent Document 1 Japanese Patent Application Laid-Open No. 10-64781 [0005] In the manufacturing process of electronic devices and optical devices using photolithography, functional crystals are first formed on the entire surface of a base substrate. Next, an alignment mark is formed on the functional crystal by using a pre-set notch or an orientation flat on the base substrate as a mec...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/20
CPCG03F9/708H01L21/02439H01L21/02521H01L21/02502H01L21/02458G03F9/7084H01L21/02433H01L21/02441H01L21/02642H01L21/02381H01L21/0254H01L21/20
Inventor 佐泽洋幸
Owner SUMITOMO CHEM CO LTD