Array substrate, manufacturing method thereof and display device

Abstract

The invention discloses an array substrate, a manufacturing method thereof and a display device and relates to an electronic process technology. Through the improvement on a design of an etching barrier layer, the area of the etching barrier layer is larger than or equal to the area of an activating layer, through holes are arranged at the joints of a source electrode layer, a drain electrode layer and the activating layer, and further the situation that additional step climbing appears when the source electrode layer, the drain electrode layer or the activating layer is bordered on the etching barrier layer is avoided.

Description

technical field [0001] The invention relates to electronic technology, in particular to an array substrate, a manufacturing method thereof, and a display device. Background technique [0002] Organic light-emitting displays are a new generation of display devices. Compared with liquid crystal displays, they have many advantages, such as: self-illumination, fast response speed, wide viewing angle, etc., and can be used for flexible displays, transparent displays, 3D displays, etc. [0003] In an active matrix organic light-emitting display, each pixel is controlled by a thin film transistor, so each pixel can be independently controlled through a driving circuit without causing crosstalk to other pixels. [0004] The array substrate includes a thin film transistor and a gate lead-out region or a source lead-out region, and the thin film transistor at least includes a gate, a source, a drain, a gate insulating layer and an activation layer. At present, the active layer is mai...

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Problems solved by technology

[0006] At present, in the fabrication process of the oxide array substrate, the source electrode layer and the drain electrode layer are formed after the etching stopper layer is formed, Figure 1a and Figure 1b It is a cross-sectional view of an array substrate, including a substrate 100, a gate electrode layer 101, a gate insulating layer 102, an activation layer 103, an etching stopper layer 104, a source electrode layer 105a, a drain electrode layer 105b, a passivation layer 106, and a transparent electrode layer 107, The design of the etching stopper layer 104 makes the place where the source electrode layer 105a, the drain electrode layer 105b and the etching stopper layer 104 border each other have a step climbing, which is easy to cause disconnection of the source electrode layer 105a and the drain electrode layer 105b. Or the over-etching of the active layer 103 affects the yield of the product

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