Hardware encrypting UART (Universal Asynchronous Receiver Transmitter) device based on APB (Advanced Peripheral Bus) bus
An APB bus, hardware encryption technology, applied in the direction of encryption device with shift register/memory, etc., can solve the problems of difficult card issuance, poor practicability, poor security, etc., to achieve good security and ease of use, hardware resources simple effect
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[0024] The present invention will be further described below in conjunction with the accompanying drawings.
[0025] refer to Figure 2 to Figure 8 , a hardware encryption UART device based on the APB bus, comprising an APB bus module 1, a UART bus module 2, a hardware encryption module 3, a hardware decryption module 4, a control module 5, an 8-bit 2-to-1 multiplexer 6 of the encryption module, The decryption module is an 8-bit 2-to-1 multiplexer 7 .
[0026] APB bus interface module 1 has an interrupt request signal and all signal lines defined by the AMBA APB bus, and is responsible for communicating with the APB host, delivering the control commands from the APB bus and the plaintext data to be sent to the UART control module 5 and the hardware encryption module 3. Responsible for packing the status signal of the control module 5 and the received data from the hardware decryption module 4 to the APB bus.
[0027] The interrupt request signal keeps low level when there is...
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