Hardware encrypting UART (Universal Asynchronous Receiver Transmitter) device based on APB (Advanced Peripheral Bus) bus

An APB bus, hardware encryption technology, applied in the direction of encryption device with shift register/memory, etc., can solve the problems of difficult card issuance, poor practicability, poor security, etc., to achieve good security and ease of use, hardware resources simple effect

Active Publication Date: 2012-10-17
平头哥上海半导体技术有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In order to overcome the shortcomings of existing UART devices, such as poor security, difficulty in issuing cards, and poor practicability, the present invention provides a hardware encryption based on APB bus with simple hardware resources, good security and ease of use UART device

Method used

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  • Hardware encrypting UART (Universal Asynchronous Receiver Transmitter) device based on APB (Advanced Peripheral Bus) bus
  • Hardware encrypting UART (Universal Asynchronous Receiver Transmitter) device based on APB (Advanced Peripheral Bus) bus
  • Hardware encrypting UART (Universal Asynchronous Receiver Transmitter) device based on APB (Advanced Peripheral Bus) bus

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Embodiment Construction

[0024] The present invention will be further described below in conjunction with the accompanying drawings.

[0025] refer to Figure 2 to Figure 8 , a hardware encryption UART device based on the APB bus, comprising an APB bus module 1, a UART bus module 2, a hardware encryption module 3, a hardware decryption module 4, a control module 5, an 8-bit 2-to-1 multiplexer 6 of the encryption module, The decryption module is an 8-bit 2-to-1 multiplexer 7 .

[0026] APB bus interface module 1 has an interrupt request signal and all signal lines defined by the AMBA APB bus, and is responsible for communicating with the APB host, delivering the control commands from the APB bus and the plaintext data to be sent to the UART control module 5 and the hardware encryption module 3. Responsible for packing the status signal of the control module 5 and the received data from the hardware decryption module 4 to the APB bus.

[0027] The interrupt request signal keeps low level when there is...

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Abstract

The invention provides a hardware encrypting UART (Universal Asynchronous Receiver Transmitter) device based on an APB (Advanced Peripheral Bus) bus. The hardware encrypting UART device comprises an APB bus interface module, an UART bus interface module, a hardware encrypting module, and a decrypting module, wherein the APB bus interface module comprises an application interrupting signal line, and all signal lines defined by an AMBAAPB bus, and is used for communication with an APB host computer; the UART bus interface module comprises two signal lines for receiving RXD (Receive Data) and sending TXD (Transmit Data), and is used for supporting the communication with other UART host computers; the hardware encrypting module is used for receiving plaintext data and an encryption key from the APB bus interface module, wherein the plaintext is 8 bits wide; and 8 bits encryption data are output according to the encryption key and the plaintext; the decrypting module is used for generating the 8 bits data according to the 8 bit encrypting data and the encryption key sent from the APB bus interface module; and the hardware encrypting module and the decrypting module are arranged between the APB bus interface module and the UART bus interface module. The hardware encrypting UART device has simple hardware resource, high safety and high usability.

Description

technical field [0001] The invention relates to the field of secure communication of embedded systems, in particular to a UART device mounted on an APB bus with a hardware encryption function. Background technique [0002] UART is a general-purpose serial data interface widely used at present, and its application range is extremely wide, such as computer peripherals, industrial control and other occasions. The function of UART is that it can not only receive the serial data input from the peripheral device, and convert it into the parallel data required inside the computer, but also convert the parallel data inside the computer into serial data, and send it to the peripheral device. For devices that do not require high serial data transmission rates, using UART for serial communication is a cost-effective design solution. [0003] The traditional ordinary UART is generally composed of a bus interface part, a control part, a receiver, a transmitter and a baud rate generator,...

Claims

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Application Information

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IPC IPC(8): H04L9/06
Inventor 严晓浪高锦炜孟建熠
Owner 平头哥上海半导体技术有限公司
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