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Second generation low power double-rate storage controller and access command processing method

A memory controller and double-rate technology, applied in the direction of memory address/allocation/relocation, etc., can solve the problems of time-consuming, reduce the access efficiency of LPDDR2 memory controller, etc., and achieve the effect of improving access efficiency

Active Publication Date: 2015-05-27
SPREADTRUM COMM (SHANGHAI) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This repeated execution of the precharge command precharge to close the block bank and the activation command Active to open the block bank and row consumes unnecessary time and reduces the access efficiency of the LPDDR2 memory controller.

Method used

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  • Second generation low power double-rate storage controller and access command processing method
  • Second generation low power double-rate storage controller and access command processing method
  • Second generation low power double-rate storage controller and access command processing method

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Embodiment Construction

[0073] In order to make the above objects, features and advantages of the present application more obvious and comprehensible, the present application will be further described in detail below in conjunction with the accompanying drawings and specific implementation methods. The LPDDR2 controller and access command processing method disclosed in the embodiments of the present application are suitable for receiving access command processing from various buses. The following embodiments will use the AXI bus as an example to describe the LPDDR2 controller and access command processing methods disclosed in the embodiments of the present application. Be explained.

[0074] an embodiment

[0075] The inventor found through research that when the existing LPDDR2 storage controller accesses the block bank and row, the currently accessed block bank is different from the last accessed block bank or the current accessed row is different from the last accessed row , you need to execute t...

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Abstract

The invention discloses a low power double data rate (LPDDR2) storage controller and an access command processing method. The LPDDR2 storage controller comprises an access determining module, a judging module and a sequencing module. Module bank accessed by currently selected access command of the sequencing module is identical to the module bank accessed by sequenced access command. When the row accessed by the currently selected access command is identical with the row accessed by the sequenced access command, the currently selected access command is sequenced at the back of the access command accessing identical module bank and row. Simultaneously, other access commands originally sequenced at the back of the access command is shifted backwards, and the access commands to access the identical module bank and row are mutually distributed at the adjacent position. When the access commands are read, the commands are read in sequence, time for closing the module bank and opening the module bank and the row is reduced, and access efficiency of the LPDDR2 storage controller is improved.

Description

technical field [0001] The present application relates to the technical field of network data storage, in particular to a second-generation low-power double-rate storage controller and an access command processing method. Background technique [0002] LPDDR2 (Low Power Double Data Rate 2, the second generation of low power double data rate) memory controller is the memory controller of the latest generation of mobile devices, and is widely used in the latest communication field baseband SOC (System on Chip, system on chip) chip among. [0003] The LPDDR2 storage controller is used to receive data from the AXI (Advanced Extensible Intergace, Advanced Extensible Interface) bus and send the data in the LPDDR2 memory to the AXI bus. The specific steps are: [0004] Step 1: The controller receives and parses the access command, obtains the access address, and determines the currently accessed block bank and row; [0005] Step 2: Determine whether the currently accessed block b...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/06
Inventor 高峰王明耀
Owner SPREADTRUM COMM (SHANGHAI) CO LTD