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Structure and manufacturing method of semiconductor chip

A manufacturing method, semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problem of time-consuming chip manufacturing process, increased cost, and hindering tools from dividing wafers into multiple chips And other issues

Active Publication Date: 2013-02-13
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, the aforementioned metal layer will prevent the tool from dividing the wafer into multiple chips, so the metal layer located on the scribe line area must be removed through an additional process, thus making the entire chip manufacturing process time-consuming and costly

Method used

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  • Structure and manufacturing method of semiconductor chip
  • Structure and manufacturing method of semiconductor chip
  • Structure and manufacturing method of semiconductor chip

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Embodiment Construction

[0015] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and understandable, the preferred embodiments of the present invention will be specifically cited below, together with the accompanying drawings, for a detailed description as follows:

[0016] It is specifically stated here that the objects depicted in the figures are not in accordance with the standard ratios of the objects (such as the ratio of substrates, chips, and circuit layers), and are only for illustration.

[0017] Please refer to figure 1 as shown, figure 1 It is a bottom view of a semiconductor chip 10a according to an embodiment of the present invention. Such as figure 1 As shown, a metal layer 16a (such as a ground layer) is disposed on the passive surface of the chip 10a, and a plurality of TSVs 14 and a plurality of grooves 15a are disposed thereon. Wherein, each of the grooves 15a is respectively located on four sides of the chip 10a and is i...

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PUM

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Abstract

The invention discloses a structure and a manufacturing method of a semiconductor chip. The semiconductor chip is provided with a plurality of long-strip-shaped annular grooves which are respectively positioned on the four side edges for defining the size of the chip, the length of each groove is smaller than the length of the side edge of the chip, and the adjacent grooves are not connected with each other.

Description

technical field [0001] The invention relates to a structure and a manufacturing method of a semiconductor chip, in particular to a strip-shaped ring-shaped semiconductor chip structure and a manufacturing method thereof. Background technique [0002] Setting a metal layer (as a ground layer) on the passive surface of the chip, and using a through-silicon via (TSV, Through-Silicon Via) to electrically connect the aforementioned metal layer and the circuit layer on the active surface of the chip has become the main means. . TSV technology is often used in the electrical connection between the upper and lower surface circuits of the same chip or silicon spacer (interposer), so as to be applied in stacked chip packaging, so TSV is beneficial to 3D stacked packaging The development of technology can effectively improve the integration and performance of the chip. [0003] However, the aforementioned metal layer will prevent the cutter from dividing the wafer into multiple chips...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/485H01L21/78H01L23/488H01L21/60
CPCH01L2924/10158H01L2224/48465H01L2224/73265H01L24/32H01L2224/48247
Inventor 郑斌宏
Owner ADVANCED SEMICON ENG INC