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Package on package structure and manufacturing method thereof

A packaging and device technology, applied in semiconductor/solid-state device manufacturing, electrical components, semiconductor devices, etc., can solve problems such as increased die power and heat dissipation failure

Active Publication Date: 2015-12-16
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

But the increased die power of the bottom package in a POP leads not only to thermal failure, but also to severe thermal stress and warpage due to thermal expansion mismatch between package components

Method used

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  • Package on package structure and manufacturing method thereof
  • Package on package structure and manufacturing method thereof
  • Package on package structure and manufacturing method thereof

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Experimental program
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Embodiment Construction

[0027] will refer to Figure 1 to Figure 3 Each step of forming a package-on-package (PoP) will be described. It should be understood that the materials, geometries, dimensions, structures and process parameters described herein are examples only and are not intended to and should not be construed as limiting the invention claimed herein. Numerous alterations and modifications may occur to those skilled in the art once informed of the present disclosure.

[0028] will refer to figure 1 (include figure 1 a to Figure 1e ) discusses the first embodiment package. figure 1 a shows the top package 1 to be used in a PoP package. The top package 1 may be formed using a plastic ball grid array (PBGA) package assembly process or similar process, and includes a plurality of stacked die 2 that may be connected via contacts 16 (on corresponding stacked tubes). core 2 ), bond wires 6 and contacts 12 (on top substrate 10 ) are wire bonded to top substrate 10 . A single stacked die ma...

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Abstract

The present invention relates to a package-on-package structure that improves thermal conductivity and mechanical strength by introducing a rigid thermal connection between a first package and a second package. The first package has a first substrate and a via through the first substrate. A first set of conductive elements are aligned with and connected to the vias of the first substrate. A rigid thermal link connects the first set of conductive elements and the die of the second package. A second set of conductive elements is coupled to the die, and a base substrate is coupled to the second set of conductive elements. The thermal link can be, for example, an interposer, heat sink, or thermally conductive layer. The invention also provides a package on the package structure and a manufacturing method thereof.

Description

technical field [0001] The present invention relates to the field of semiconductors, and more specifically, the present invention relates to a package on a package structure and a manufacturing method thereof. Background technique [0002] Package-on-Package (POP) is becoming more and more popular in integrated circuit packaging technology due to the higher density of electronic devices provided. But the increased die power of the bottom package in a POP leads not only to thermal failure, but also to severe thermal stress and warpage due to thermal expansion mismatch between package components. Contents of the invention [0003] In order to solve the problems existing in the prior art, according to one aspect of the present invention, a semiconductor device is provided, including: a first package, including a first substrate and a through hole passing through the first substrate; a first set of conductive elements aligned with and connected to the through holes of the fir...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/44H01L21/48
CPCH01L23/36H01L23/3677H01L23/42H01L23/49816H01L2224/16225H01L2224/32145H01L2224/32225H01L2224/48227H01L2224/48465H01L2224/73265H01L2924/15311H01L24/16H01L24/32H01L24/48H01L24/73H01L2224/291H01L2224/73253H01L2924/15331H01L2224/2929H01L2224/293H01L2225/1023H01L2225/1058H01L2225/1094H01L2924/181H01L2924/00014H01L25/105H01L2924/00012H01L2924/014H01L2924/00H01L2224/45099H01L2224/45015H01L2924/207H01L23/3675H01L23/49827H01L23/49838H01L24/81H01L25/50H01L2224/16146H01L2224/16235H01L2224/17519H01L2224/81801
Inventor 林文益游明志林柏尧卢景睿吴俊毅
Owner TAIWAN SEMICON MFG CO LTD